2023-08-30 17:31:07 +02:00
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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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2023-10-24 12:59:35 +02:00
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$id: http://devicetree.org/schemas/arm/mediatek/mediatek,mt7622-wed.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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2023-08-30 17:31:07 +02:00
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title: MediaTek Wireless Ethernet Dispatch Controller for MT7622
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maintainers:
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- Lorenzo Bianconi <lorenzo@kernel.org>
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- Felix Fietkau <nbd@nbd.name>
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description:
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The mediatek wireless ethernet dispatch controller can be configured to
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intercept and handle access to the WLAN DMA queues and PCIe interrupts
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and implement hardware flow offloading from ethernet to WLAN.
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properties:
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compatible:
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items:
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- enum:
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- mediatek,mt7622-wed
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2023-10-24 12:59:35 +02:00
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- mediatek,mt7981-wed
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2023-08-30 17:31:07 +02:00
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- mediatek,mt7986-wed
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- const: syscon
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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memory-region:
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items:
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- description: firmware EMI region
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- description: firmware ILM region
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- description: firmware DLM region
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- description: firmware CPU DATA region
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- description: firmware BOOT region
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memory-region-names:
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items:
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- const: wo-emi
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- const: wo-ilm
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- const: wo-dlm
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- const: wo-data
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- const: wo-boot
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mediatek,wo-ccif:
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$ref: /schemas/types.yaml#/definitions/phandle
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description: mediatek wed-wo controller interface.
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allOf:
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- if:
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properties:
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compatible:
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contains:
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const: mediatek,mt7622-wed
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then:
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properties:
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memory-region-names: false
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memory-region: false
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mediatek,wo-ccif: false
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required:
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- compatible
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- reg
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- interrupts
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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wed0: wed@1020a000 {
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compatible = "mediatek,mt7622-wed","syscon";
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reg = <0 0x1020a000 0 0x1000>;
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interrupts = <GIC_SPI 214 IRQ_TYPE_LEVEL_LOW>;
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};
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};
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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wed@15010000 {
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compatible = "mediatek,mt7986-wed", "syscon";
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reg = <0 0x15010000 0 0x1000>;
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interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>;
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memory-region = <&wo_emi>, <&wo_ilm>, <&wo_dlm>,
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<&wo_data>, <&wo_boot>;
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memory-region-names = "wo-emi", "wo-ilm", "wo-dlm",
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"wo-data", "wo-boot";
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mediatek,wo-ccif = <&wo_ccif0>;
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};
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};
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