52 lines
1.7 KiB
Plaintext
52 lines
1.7 KiB
Plaintext
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* Amlogic Meson8, Meson8b and Meson8m2 Clock and Reset Unit
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The Amlogic Meson8 / Meson8b / Meson8m2 clock controller generates and
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supplies clock to various controllers within the SoC.
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Required Properties:
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- compatible: must be one of:
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- "amlogic,meson8-clkc" for Meson8 (S802) SoCs
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- "amlogic,meson8b-clkc" for Meson8 (S805) SoCs
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- "amlogic,meson8m2-clkc" for Meson8m2 (S812) SoCs
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- #clock-cells: should be 1.
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- #reset-cells: should be 1.
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- clocks: list of clock phandles, one for each entry in clock-names
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- clock-names: should contain the following:
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* "xtal": the 24MHz system oscillator
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* "ddr_pll": the DDR PLL clock
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* "clk_32k": (if present) the 32kHz clock signal from GPIOAO_6 (CLK_32K_IN)
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Parent node should have the following properties :
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- compatible: "amlogic,meson-hhi-sysctrl", "simple-mfd", "syscon"
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- reg: base address and size of the HHI system control register space.
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Each clock is assigned an identifier and client nodes can use this identifier
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to specify the clock which they consume. All available clocks are defined as
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preprocessor macros in the dt-bindings/clock/meson8b-clkc.h header and can be
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used in device tree sources.
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Similarly a preprocessor macro for each reset line is defined in
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dt-bindings/reset/amlogic,meson8b-clkc-reset.h (which can be used from the
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device tree sources).
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Example: Clock controller node:
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clkc: clock-controller {
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compatible = "amlogic,meson8b-clkc";
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#clock-cells = <1>;
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#reset-cells = <1>;
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};
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Example: UART controller node that consumes the clock generated by the clock
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controller:
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uart_AO: serial@c81004c0 {
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compatible = "amlogic,meson-uart";
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reg = <0xc81004c0 0x14>;
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interrupts = <0 90 1>;
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clocks = <&clkc CLKID_CLK81>;
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};
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