64 lines
1.3 KiB
YAML
64 lines
1.3 KiB
YAML
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/nuvoton,ma35d1-clk.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Nuvoton MA35D1 Clock Controller Module
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maintainers:
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- Chi-Fang Li <cfli0@nuvoton.com>
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- Jacky Huang <ychuang3@nuvoton.com>
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description: |
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The MA35D1 clock controller generates clocks for the whole chip,
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including system clocks and all peripheral clocks.
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See also:
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include/dt-bindings/clock/ma35d1-clk.h
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properties:
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compatible:
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items:
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- const: nuvoton,ma35d1-clk
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reg:
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maxItems: 1
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"#clock-cells":
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const: 1
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clocks:
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maxItems: 1
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nuvoton,pll-mode:
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description:
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A list of PLL operation mode corresponding to CAPLL, DDRPLL, APLL,
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EPLL, and VPLL in sequential.
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maxItems: 5
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items:
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enum:
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- integer
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- fractional
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- spread-spectrum
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$ref: /schemas/types.yaml#/definitions/non-unique-string-array
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required:
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- compatible
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- reg
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- "#clock-cells"
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- clocks
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additionalProperties: false
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examples:
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- |
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clock-controller@40460200 {
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compatible = "nuvoton,ma35d1-clk";
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reg = <0x40460200 0x100>;
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#clock-cells = <1>;
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clocks = <&clk_hxt>;
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};
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...
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