122 lines
4.1 KiB
YAML
122 lines
4.1 KiB
YAML
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/qcom,gcc-sc8280xp.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm Global Clock & Reset Controller on SC8280xp
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maintainers:
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- Bjorn Andersson <bjorn.andersson@linaro.org>
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description: |
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Qualcomm global clock control module provides the clocks, resets and
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power domains on SC8280xp.
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See also:: include/dt-bindings/clock/qcom,gcc-sc8280xp.h
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properties:
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compatible:
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const: qcom,gcc-sc8280xp
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clocks:
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items:
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- description: XO reference clock
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- description: Sleep clock
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- description: UFS memory first RX symbol clock
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- description: UFS memory second RX symbol clock
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- description: UFS memory first TX symbol clock
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- description: UFS card first RX symbol clock
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- description: UFS card second RX symbol clock
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- description: UFS card first TX symbol clock
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- description: Primary USB SuperSpeed pipe clock
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- description: USB4 PHY pipegmux clock source
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- description: USB4 PHY DP gmux clock source
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- description: USB4 PHY sys pipegmux clock source
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- description: USB4 PHY PCIe pipe clock
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- description: USB4 PHY router max pipe clock
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- description: Primary USB4 RX0 clock
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- description: Primary USB4 RX1 clock
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- description: Secondary USB SuperSpeed pipe clock
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- description: Second USB4 PHY pipegmux clock source
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- description: Second USB4 PHY DP gmux clock source
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- description: Second USB4 PHY sys pipegmux clock source
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- description: Second USB4 PHY PCIe pipe clock
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- description: Second USB4 PHY router max pipe clock
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- description: Secondary USB4 RX0 clock
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- description: Secondary USB4 RX1 clock
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- description: Multiport USB first SuperSpeed pipe clock
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- description: Multiport USB second SuperSpeed pipe clock
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- description: PCIe 2a pipe clock
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- description: PCIe 2b pipe clock
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- description: PCIe 3a pipe clock
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- description: PCIe 3b pipe clock
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- description: PCIe 4 pipe clock
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- description: First EMAC controller reference clock
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- description: Second EMAC controller reference clock
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power-domains:
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items:
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- description: CX domain
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protected-clocks:
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maxItems: 389
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required:
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- compatible
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- clocks
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allOf:
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- $ref: qcom,gcc.yaml#
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/clock/qcom,rpmh.h>
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#include <dt-bindings/power/qcom-rpmpd.h>
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clock-controller@100000 {
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compatible = "qcom,gcc-sc8280xp";
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reg = <0x00100000 0x1f0000>;
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clocks = <&rpmhcc RPMH_CXO_CLK>,
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<&sleep_clk>,
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<&ufs_phy_rx_symbol_0_clk>,
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<&ufs_phy_rx_symbol_1_clk>,
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<&ufs_phy_tx_symbol_0_clk>,
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<&ufs_card_rx_symbol_0_clk>,
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<&ufs_card_rx_symbol_1_clk>,
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<&ufs_card_tx_symbol_0_clk>,
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<&usb_0_ssphy>,
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<&gcc_usb4_phy_pipegmux_clk_src>,
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<&gcc_usb4_phy_dp_gmux_clk_src>,
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<&gcc_usb4_phy_sys_pipegmux_clk_src>,
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<&usb4_phy_gcc_usb4_pcie_pipe_clk>,
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<&usb4_phy_gcc_usb4rtr_max_pipe_clk>,
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<&qusb4phy_gcc_usb4_rx0_clk>,
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<&qusb4phy_gcc_usb4_rx1_clk>,
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<&usb_1_ssphy>,
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<&gcc_usb4_1_phy_pipegmux_clk_src>,
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<&gcc_usb4_1_phy_dp_gmux_clk_src>,
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<&gcc_usb4_1_phy_sys_pipegmux_clk_src>,
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<&usb4_1_phy_gcc_usb4_pcie_pipe_clk>,
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<&usb4_1_phy_gcc_usb4rtr_max_pipe_clk>,
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<&qusb4phy_1_gcc_usb4_rx0_clk>,
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<&qusb4phy_1_gcc_usb4_rx1_clk>,
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<&usb_2_ssphy>,
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<&usb_3_ssphy>,
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<&pcie2a_lane>,
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<&pcie2b_lane>,
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<&pcie3a_lane>,
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<&pcie3b_lane>,
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<&pcie4_lane>,
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<&rxc0_ref_clk>,
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<&rxc1_ref_clk>;
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power-domains = <&rpmhpd SC8280XP_CX>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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#power-domain-cells = <1>;
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};
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...
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