156 lines
3.4 KiB
YAML
156 lines
3.4 KiB
YAML
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/crypto/qcom-qce.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm crypto engine driver
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maintainers:
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- Bhupesh Sharma <bhupesh.sharma@linaro.org>
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description:
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This document defines the binding for the QCE crypto
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controller found on Qualcomm parts.
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properties:
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compatible:
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oneOf:
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- const: qcom,crypto-v5.1
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deprecated: true
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description: Kept only for ABI backward compatibility
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- const: qcom,crypto-v5.4
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deprecated: true
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description: Kept only for ABI backward compatibility
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- items:
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- enum:
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- qcom,ipq4019-qce
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- qcom,sm8150-qce
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- const: qcom,qce
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- items:
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- enum:
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- qcom,ipq6018-qce
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- qcom,ipq8074-qce
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- qcom,msm8996-qce
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- qcom,qcm2290-qce
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- qcom,sdm845-qce
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- qcom,sm6115-qce
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- const: qcom,ipq4019-qce
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- const: qcom,qce
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- items:
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- enum:
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- qcom,sm8250-qce
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- qcom,sm8350-qce
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- qcom,sm8450-qce
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- qcom,sm8550-qce
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- const: qcom,sm8150-qce
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- const: qcom,qce
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reg:
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maxItems: 1
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clocks:
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minItems: 1
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maxItems: 3
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clock-names:
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minItems: 1
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maxItems: 3
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iommus:
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minItems: 1
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maxItems: 8
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description:
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phandle to apps_smmu node with sid mask.
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interconnects:
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maxItems: 1
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description:
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Interconnect path between qce crypto and main memory.
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interconnect-names:
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const: memory
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dmas:
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items:
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- description: DMA specifiers for rx dma channel.
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- description: DMA specifiers for tx dma channel.
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dma-names:
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items:
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- const: rx
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- const: tx
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allOf:
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- if:
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properties:
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compatible:
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contains:
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enum:
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- qcom,crypto-v5.1
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- qcom,crypto-v5.4
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- qcom,ipq6018-qce
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- qcom,ipq8074-qce
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- qcom,msm8996-qce
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- qcom,sdm845-qce
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then:
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properties:
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clocks:
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maxItems: 3
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clock-names:
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items:
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- const: iface
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- const: bus
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- const: core
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required:
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- clocks
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- clock-names
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- if:
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properties:
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compatible:
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contains:
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enum:
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- qcom,qcm2290-qce
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- qcom,sm6115-qce
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then:
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properties:
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clocks:
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maxItems: 1
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clock-names:
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items:
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- const: core
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required:
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- clocks
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- clock-names
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required:
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- compatible
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- reg
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- dmas
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- dma-names
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/qcom,gcc-apq8084.h>
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crypto-engine@fd45a000 {
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compatible = "qcom,ipq6018-qce", "qcom,ipq4019-qce", "qcom,qce";
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reg = <0xfd45a000 0x6000>;
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clocks = <&gcc GCC_CE2_AHB_CLK>,
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<&gcc GCC_CE2_AXI_CLK>,
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<&gcc GCC_CE2_CLK>;
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clock-names = "iface", "bus", "core";
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dmas = <&cryptobam 2>, <&cryptobam 3>;
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dma-names = "rx", "tx";
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iommus = <&apps_smmu 0x584 0x0011>,
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<&apps_smmu 0x586 0x0011>,
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<&apps_smmu 0x594 0x0011>,
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<&apps_smmu 0x596 0x0011>;
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};
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