132 lines
2.8 KiB
YAML
132 lines
2.8 KiB
YAML
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/display/arm,komeda.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Arm Komeda display processor
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maintainers:
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- Liviu Dudau <Liviu.Dudau@arm.com>
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- Andre Przywara <andre.przywara@arm.com>
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description:
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The Arm Mali D71 display processor supports up to two displays with up
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to a 4K resolution each. Each pipeline can be composed of up to four
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layers. It is typically connected to a digital display connector like HDMI.
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properties:
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compatible:
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oneOf:
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- items:
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- const: arm,mali-d32
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- const: arm,mali-d71
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- const: arm,mali-d71
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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clock-names:
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const: aclk
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clocks:
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maxItems: 1
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description: The main DPU processor clock
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"#address-cells":
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const: 1
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"#size-cells":
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const: 0
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memory-region:
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maxItems: 1
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description:
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Phandle to a node describing memory to be used for the framebuffer.
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If not present, the framebuffer may be located anywhere in memory.
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iommus:
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description:
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The stream IDs for each of the used pipelines, each four IDs for the
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four layers, plus one for the write-back stream.
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minItems: 5
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maxItems: 10
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patternProperties:
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'^pipeline@[01]$':
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type: object
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additionalProperties: false
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description:
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clocks
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properties:
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reg:
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enum: [ 0, 1 ]
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clock-names:
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const: pxclk
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clocks:
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maxItems: 1
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description: The input reference for the pixel clock.
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port:
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$ref: /schemas/graph.yaml#/$defs/port-base
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unevaluatedProperties: false
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additionalProperties: false
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required:
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- "#address-cells"
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- "#size-cells"
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- compatible
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- reg
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- interrupts
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- clock-names
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- clocks
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- pipeline@0
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examples:
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- |
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display@c00000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "arm,mali-d71";
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reg = <0xc00000 0x20000>;
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interrupts = <168>;
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clocks = <&dpu_aclk>;
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clock-names = "aclk";
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iommus = <&smmu 0>, <&smmu 1>, <&smmu 2>, <&smmu 3>,
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<&smmu 8>,
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<&smmu 4>, <&smmu 5>, <&smmu 6>, <&smmu 7>,
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<&smmu 9>;
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dp0_pipe0: pipeline@0 {
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clocks = <&fpgaosc2>;
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clock-names = "pxclk";
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reg = <0>;
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port {
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dp0_pipe0_out: endpoint {
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remote-endpoint = <&db_dvi0_in>;
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};
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};
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};
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dp0_pipe1: pipeline@1 {
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clocks = <&fpgaosc2>;
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clock-names = "pxclk";
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reg = <1>;
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port {
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dp0_pipe1_out: endpoint {
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remote-endpoint = <&db_dvi1_in>;
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};
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};
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};
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};
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...
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