2023-08-30 17:31:07 +02:00
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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/media/renesas,fcp.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Renesas R-Car Frame Compression Processor (FCP)
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maintainers:
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- Laurent Pinchart <laurent.pinchart@ideasonboard.com>
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description: |
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The FCP is a companion module of video processing modules in the Renesas
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R-Car Gen3 and RZ/G2 SoCs. It provides data compression and decompression,
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data caching, and conversion of AXI transactions in order to reduce the
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memory bandwidth.
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There are three types of FCP: FCP for Codec (FCPC), FCP for VSP (FCPV) and
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FCP for FDP (FCPF). Their configuration and behaviour depend on the module
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they are paired with. These DT bindings currently support the FCPV and FCPF.
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properties:
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compatible:
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2023-10-24 12:59:35 +02:00
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oneOf:
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- enum:
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- renesas,fcpv # FCP for VSP
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- renesas,fcpf # FCP for FDP
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- items:
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- enum:
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- renesas,r9a07g044-fcpvd # RZ/G2{L,LC}
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- renesas,r9a07g054-fcpvd # RZ/V2L
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- const: renesas,fcpv # Generic FCP for VSP fallback
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2023-08-30 17:31:07 +02:00
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reg:
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maxItems: 1
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2023-10-24 12:59:35 +02:00
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clocks: true
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clock-names: true
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2023-08-30 17:31:07 +02:00
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iommus:
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maxItems: 1
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power-domains:
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maxItems: 1
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resets:
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maxItems: 1
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required:
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- compatible
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- reg
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- clocks
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- power-domains
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- resets
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additionalProperties: false
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2023-10-24 12:59:35 +02:00
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allOf:
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- if:
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properties:
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compatible:
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contains:
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enum:
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- renesas,r9a07g044-fcpvd
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- renesas,r9a07g054-fcpvd
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then:
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properties:
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clocks:
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items:
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- description: Main clock
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- description: Register access clock
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- description: Video clock
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clock-names:
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items:
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- const: aclk
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- const: pclk
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- const: vclk
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required:
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- clock-names
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else:
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properties:
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clocks:
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maxItems: 1
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clock-names: false
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2023-08-30 17:31:07 +02:00
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examples:
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# R8A7795 (R-Car H3) FCP for VSP-D1
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- |
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#include <dt-bindings/clock/renesas-cpg-mssr.h>
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#include <dt-bindings/power/r8a7795-sysc.h>
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fcp@fea2f000 {
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compatible = "renesas,fcpv";
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reg = <0xfea2f000 0x200>;
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clocks = <&cpg CPG_MOD 602>;
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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resets = <&cpg 602>;
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iommus = <&ipmmu_vi0 9>;
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};
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...
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