81 lines
2.6 KiB
YAML
81 lines
2.6 KiB
YAML
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/memory-controllers/intel,ixp4xx-expansion-peripheral-props.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Peripheral properties for Intel IXP4xx Expansion Bus
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description:
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The IXP4xx expansion bus controller handles access to devices on the
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memory-mapped expansion bus on the Intel IXP4xx family of system on chips,
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including IXP42x, IXP43x, IXP45x and IXP46x.
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maintainers:
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- Linus Walleij <linus.walleij@linaro.org>
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properties:
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intel,ixp4xx-eb-t1:
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description: Address timing, extend address phase with n cycles.
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$ref: /schemas/types.yaml#/definitions/uint32
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maximum: 3
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intel,ixp4xx-eb-t2:
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description: Setup chip select timing, extend setup phase with n cycles.
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$ref: /schemas/types.yaml#/definitions/uint32
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maximum: 3
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intel,ixp4xx-eb-t3:
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description: Strobe timing, extend strobe phase with n cycles.
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$ref: /schemas/types.yaml#/definitions/uint32
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maximum: 15
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intel,ixp4xx-eb-t4:
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description: Hold timing, extend hold phase with n cycles.
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$ref: /schemas/types.yaml#/definitions/uint32
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maximum: 3
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intel,ixp4xx-eb-t5:
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description: Recovery timing, extend recovery phase with n cycles.
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$ref: /schemas/types.yaml#/definitions/uint32
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maximum: 15
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intel,ixp4xx-eb-cycle-type:
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description: The type of cycles to use on the expansion bus for this
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chip select. 0 = Intel cycles, 1 = Motorola cycles, 2 = HPI cycles.
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$ref: /schemas/types.yaml#/definitions/uint32
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enum: [0, 1, 2]
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intel,ixp4xx-eb-byte-access-on-halfword:
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description: Allow byte read access on half word devices.
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$ref: /schemas/types.yaml#/definitions/uint32
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enum: [0, 1]
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intel,ixp4xx-eb-hpi-hrdy-pol-high:
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description: Set HPI HRDY polarity to active high when using HPI.
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$ref: /schemas/types.yaml#/definitions/uint32
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enum: [0, 1]
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intel,ixp4xx-eb-mux-address-and-data:
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description: Multiplex address and data on the data bus.
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$ref: /schemas/types.yaml#/definitions/uint32
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enum: [0, 1]
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intel,ixp4xx-eb-ahb-split-transfers:
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description: Enable AHB split transfers.
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$ref: /schemas/types.yaml#/definitions/uint32
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enum: [0, 1]
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intel,ixp4xx-eb-write-enable:
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description: Enable write cycles.
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$ref: /schemas/types.yaml#/definitions/uint32
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enum: [0, 1]
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intel,ixp4xx-eb-byte-access:
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description: Expansion bus uses only 8 bits. The default is to use
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16 bits.
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$ref: /schemas/types.yaml#/definitions/uint32
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enum: [0, 1]
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additionalProperties: true
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