161 lines
4.2 KiB
YAML
161 lines
4.2 KiB
YAML
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/remoteproc/qcom,qcs404-cdsp-pil.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm QCS404 CDSP Peripheral Image Loader
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maintainers:
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- Bjorn Andersson <bjorn.andersson@linaro.org>
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description:
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This document defines the binding for a component that loads and boots firmware
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on the Qualcomm Technology Inc. CDSP (Compute DSP).
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properties:
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compatible:
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enum:
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- qcom,qcs404-cdsp-pil
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reg:
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maxItems: 1
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description:
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The base address and size of the qdsp6ss register
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interrupts:
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items:
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- description: Watchdog interrupt
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- description: Fatal interrupt
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- description: Ready interrupt
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- description: Handover interrupt
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- description: Stop acknowledge interrupt
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interrupt-names:
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items:
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- const: wdog
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- const: fatal
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- const: ready
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- const: handover
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- const: stop-ack
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clocks:
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items:
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- description: XO clock
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- description: SWAY clock
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- description: TBU clock
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- description: BIMC clock
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- description: AHB AON clock
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- description: Q6SS SLAVE clock
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- description: Q6SS MASTER clock
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- description: Q6 AXIM clock
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clock-names:
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items:
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- const: xo
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- const: sway
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- const: tbu
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- const: bimc
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- const: ahb_aon
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- const: q6ss_slave
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- const: q6ss_master
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- const: q6_axim
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power-domains:
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items:
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- description: CX power domain
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resets:
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items:
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- description: AOSS restart
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reset-names:
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items:
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- const: restart
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memory-region:
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maxItems: 1
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description: Reference to the reserved-memory for the Hexagon core
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qcom,halt-regs:
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$ref: /schemas/types.yaml#/definitions/phandle-array
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description:
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Phandle reference to a syscon representing TCSR followed by the
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three offsets within syscon for q6, modem and nc halt registers.
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qcom,smem-states:
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$ref: /schemas/types.yaml#/definitions/phandle-array
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description: States used by the AP to signal the Hexagon core
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items:
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- description: Stop the modem
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qcom,smem-state-names:
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description: The names of the state bits used for SMP2P output
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items:
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- const: stop
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required:
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- compatible
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- reg
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- interrupts
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- interrupt-names
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- clocks
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- clock-names
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- power-domains
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- resets
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- reset-names
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- qcom,halt-regs
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- memory-region
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- qcom,smem-states
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- qcom,smem-state-names
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/clock/qcom,gcc-qcs404.h>
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#include <dt-bindings/power/qcom-rpmpd.h>
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#include <dt-bindings/clock/qcom,turingcc-qcs404.h>
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remoteproc@b00000 {
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compatible = "qcom,qcs404-cdsp-pil";
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reg = <0x00b00000 0x4040>;
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interrupts-extended = <&intc GIC_SPI 229 IRQ_TYPE_EDGE_RISING>,
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<&cdsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
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<&cdsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
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<&cdsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
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<&cdsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>;
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interrupt-names = "wdog", "fatal", "ready",
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"handover", "stop-ack";
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clocks = <&xo_board>,
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<&gcc GCC_CDSP_CFG_AHB_CLK>,
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<&gcc GCC_CDSP_TBU_CLK>,
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<&gcc GCC_BIMC_CDSP_CLK>,
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<&turingcc TURING_WRAPPER_AON_CLK>,
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<&turingcc TURING_Q6SS_AHBS_AON_CLK>,
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<&turingcc TURING_Q6SS_AHBM_AON_CLK>,
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<&turingcc TURING_Q6SS_Q6_AXIM_CLK>;
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clock-names = "xo",
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"sway",
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"tbu",
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"bimc",
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"ahb_aon",
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"q6ss_slave",
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"q6ss_master",
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"q6_axim";
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power-domains = <&rpmhpd SDM845_CX>;
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resets = <&gcc GCC_CDSP_RESTART>;
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reset-names = "restart";
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qcom,halt-regs = <&tcsr 0x19004>;
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memory-region = <&cdsp_fw_mem>;
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qcom,smem-states = <&cdsp_smp2p_out 0>;
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qcom,smem-state-names = "stop";
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};
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