2023-08-30 17:31:07 +02:00
|
|
|
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
|
|
|
|
|
|
|
/dts-v1/;
|
|
|
|
|
|
|
|
#include "rk3566-soquartz.dtsi"
|
|
|
|
|
|
|
|
/ {
|
|
|
|
model = "Pine64 RK3566 SoQuartz with CM4-IO Carrier Board";
|
|
|
|
compatible = "pine64,soquartz-cm4io", "pine64,soquartz", "rockchip,rk3566";
|
|
|
|
|
|
|
|
/* labeled +12v in schematic */
|
|
|
|
vcc12v_dcin: vcc12v-dcin-regulator {
|
|
|
|
compatible = "regulator-fixed";
|
|
|
|
regulator-name = "vcc12v_dcin";
|
|
|
|
regulator-always-on;
|
|
|
|
regulator-boot-on;
|
|
|
|
regulator-min-microvolt = <12000000>;
|
|
|
|
regulator-max-microvolt = <12000000>;
|
|
|
|
};
|
|
|
|
|
|
|
|
/* labeled +5v in schematic */
|
|
|
|
vcc_5v: vcc-5v-regulator {
|
|
|
|
compatible = "regulator-fixed";
|
|
|
|
regulator-name = "vcc_5v";
|
|
|
|
regulator-always-on;
|
|
|
|
regulator-boot-on;
|
|
|
|
regulator-min-microvolt = <5000000>;
|
|
|
|
regulator-max-microvolt = <5000000>;
|
|
|
|
vin-supply = <&vcc12v_dcin>;
|
|
|
|
};
|
2023-10-24 12:59:35 +02:00
|
|
|
|
|
|
|
vcc_sd_pwr: vcc-sd-pwr-regulator {
|
|
|
|
compatible = "regulator-fixed";
|
|
|
|
regulator-name = "vcc_sd_pwr";
|
|
|
|
regulator-always-on;
|
|
|
|
regulator-boot-on;
|
|
|
|
regulator-min-microvolt = <3300000>;
|
|
|
|
regulator-max-microvolt = <3300000>;
|
|
|
|
vin-supply = <&vcc3v3_sys>;
|
|
|
|
};
|
2023-08-30 17:31:07 +02:00
|
|
|
};
|
|
|
|
|
|
|
|
/* phy for pcie */
|
|
|
|
&combphy2 {
|
|
|
|
phy-supply = <&vcc3v3_sys>;
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&gmac1 {
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
/*
|
|
|
|
* i2c1 is exposed on CM1 / Module1A
|
|
|
|
* pin 80 - SCL0 - i2c1_scl_m0, pullup to vcc3v3_pmu
|
|
|
|
* pin 82 - SDA0 - i2c1_sda_m0, pullup to vcc3v3_pmu
|
|
|
|
*/
|
|
|
|
&i2c1 {
|
|
|
|
status = "okay";
|
|
|
|
|
|
|
|
/*
|
|
|
|
* the rtc interrupt is tied to PMIC_PWRON,
|
|
|
|
* it will force reset the board if triggered.
|
|
|
|
*/
|
|
|
|
pcf85063: rtc@51 {
|
|
|
|
compatible = "nxp,pcf85063";
|
|
|
|
reg = <0x51>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
/*
|
|
|
|
* i2c2 is exposed on CM1 / Module1A - to PI40
|
|
|
|
* pin 56 - GPIO3 - i2c2_scl_m1, pullup to vcc_3v3, shared with i2s1_8ch
|
|
|
|
* pin 58 - GPIO2 - i2c2_sda_m1, pullup to vcc_3v3
|
|
|
|
*/
|
|
|
|
&i2c2 {
|
|
|
|
status = "disabled";
|
|
|
|
};
|
|
|
|
|
|
|
|
/*
|
|
|
|
* i2c3 is exposed on CM1 / Module1A - to PI40
|
|
|
|
* pin 35 - ID_SC(GPIO28) - i2c3_scl_m0, pullup to vcc_3v3
|
|
|
|
* pin 36 - ID_SD(GPIO27) - i2c3_sda_m0, pullup to vcc_3v3
|
|
|
|
*/
|
|
|
|
&i2c3 {
|
|
|
|
status = "disabled";
|
|
|
|
};
|
|
|
|
|
|
|
|
/*
|
|
|
|
* i2c4 is exposed on CM2 / Module1B - to PI40
|
|
|
|
* pin 45 - GPIO24 - i2c4_scl_m1
|
|
|
|
* pin 47 - GPIO23 - i2c4_sda_m1
|
|
|
|
*/
|
|
|
|
&i2c4 {
|
|
|
|
status = "disabled";
|
|
|
|
};
|
|
|
|
|
|
|
|
/*
|
|
|
|
* i2s1_8ch is exposed on CM1 / Module1A - to PI40
|
|
|
|
* pin 24 - GPIO26 - i2s1_sdi1_m1
|
|
|
|
* pin 25 - GPIO21 - i2s1_sdo0_m1
|
|
|
|
* pin 26 - GPIO19 - i2s1_lrck_tx_m1
|
|
|
|
* pin 27 - GPIO20 - i2s1_sdi0_m1
|
|
|
|
* pin 29 - GPIO16 - i2s1_sdi3_m1
|
|
|
|
* pin 30 - GPIO6 - i2s1_sdi2_m1
|
|
|
|
* pin 40 - GPIO9 - i2s1_sdo1_m1, shared with spi3
|
|
|
|
* pin 41 - GPIO25 - i2s1_sdo2_m1
|
|
|
|
* pin 49 - GPIO18 - i2s1_sclk_tx_m1
|
|
|
|
* pin 50 - GPIO17 - i2s1_mclk_m1
|
|
|
|
* pin 56 - GPIO3 - i2s1_sdo3_m1, shared with i2c2
|
|
|
|
*/
|
|
|
|
&i2s1_8ch {
|
|
|
|
status = "disabled";
|
|
|
|
};
|
|
|
|
|
|
|
|
&led_diy {
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&led_work {
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&pcie2x1 {
|
|
|
|
vpcie3v3-supply = <&vcc_3v3>;
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&rgmii_phy1 {
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
/*
|
|
|
|
* saradc is exposed on CM1 / Module1A - to J2
|
|
|
|
* pin 94 - AIN1 - saradc_vin3
|
|
|
|
* pin 96 - AIN0 - saradc_vin2
|
|
|
|
*/
|
|
|
|
&saradc {
|
|
|
|
status = "disabled";
|
|
|
|
};
|
|
|
|
|
|
|
|
&sdmmc0 {
|
2023-10-24 12:59:35 +02:00
|
|
|
vmmc-supply = <&vcc_sd_pwr>;
|
2023-08-30 17:31:07 +02:00
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
/*
|
|
|
|
* spi3 is exposed on CM1 / Module1A - to PI40
|
|
|
|
* pin 37 - GPIO7 - spi3_cs1_m0
|
|
|
|
* pin 38 - GPIO11 - spi3_clk_m0
|
|
|
|
* pin 39 - GPIO8 - spi3_cs0_m0
|
|
|
|
* pin 40 - GPIO9 - spi3_miso_m0, shared with i2s1_8ch
|
|
|
|
* pin 44 - GPIO10 - spi3_mosi_m0
|
|
|
|
*/
|
|
|
|
&spi3 {
|
|
|
|
status = "disabled";
|
|
|
|
};
|
|
|
|
|
|
|
|
/*
|
|
|
|
* uart2 is exposed on CM1 / Module1A - to PI40
|
|
|
|
* pin 51 - GPIO15 - uart2_rx_m0
|
|
|
|
* pin 55 - GPIO14 - uart2_tx_m0
|
|
|
|
*/
|
|
|
|
&uart2 {
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
/*
|
|
|
|
* uart7 is exposed on CM1 / Module1A - to PI40
|
|
|
|
* pin 46 - GPIO22 - uart7_tx_m2
|
|
|
|
* pin 47 - GPIO23 - uart7_rx_m2
|
|
|
|
*/
|
|
|
|
&uart7 {
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&usb2phy0 {
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&usb2phy0_otg {
|
|
|
|
phy-supply = <&vcc_5v>;
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&usb_host0_xhci {
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&vbus {
|
|
|
|
vin-supply = <&vcc_5v>;
|
|
|
|
};
|