140 lines
5.3 KiB
C
140 lines
5.3 KiB
C
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/******************************************************************************
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* arch-x86/cpuid.h
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*
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* CPUID interface to Xen.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to
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* deal in the Software without restriction, including without limitation the
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* rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*
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* Copyright (c) 2007 Citrix Systems, Inc.
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*
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* Authors:
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* Keir Fraser <keir@xen.org>
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*/
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#ifndef __XEN_PUBLIC_ARCH_X86_CPUID_H__
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#define __XEN_PUBLIC_ARCH_X86_CPUID_H__
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/*
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* For compatibility with other hypervisor interfaces, the Xen cpuid leaves
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* can be found at the first otherwise unused 0x100 aligned boundary starting
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* from 0x40000000.
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*
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* e.g If viridian extensions are enabled for an HVM domain, the Xen cpuid
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* leaves will start at 0x40000100
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*/
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#define XEN_CPUID_FIRST_LEAF 0x40000000
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#define XEN_CPUID_LEAF(i) (XEN_CPUID_FIRST_LEAF + (i))
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/*
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* Leaf 1 (0x40000x00)
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* EAX: Largest Xen-information leaf. All leaves up to an including @EAX
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* are supported by the Xen host.
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* EBX-EDX: "XenVMMXenVMM" signature, allowing positive identification
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* of a Xen host.
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*/
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#define XEN_CPUID_SIGNATURE_EBX 0x566e6558 /* "XenV" */
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#define XEN_CPUID_SIGNATURE_ECX 0x65584d4d /* "MMXe" */
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#define XEN_CPUID_SIGNATURE_EDX 0x4d4d566e /* "nVMM" */
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/*
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* Leaf 2 (0x40000x01)
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* EAX[31:16]: Xen major version.
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* EAX[15: 0]: Xen minor version.
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* EBX-EDX: Reserved (currently all zeroes).
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*/
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/*
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* Leaf 3 (0x40000x02)
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* EAX: Number of hypercall transfer pages. This register is always guaranteed
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* to specify one hypercall page.
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* EBX: Base address of Xen-specific MSRs.
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* ECX: Features 1. Unused bits are set to zero.
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* EDX: Features 2. Unused bits are set to zero.
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*/
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/* Does the host support MMU_PT_UPDATE_PRESERVE_AD for this guest? */
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#define _XEN_CPUID_FEAT1_MMU_PT_UPDATE_PRESERVE_AD 0
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#define XEN_CPUID_FEAT1_MMU_PT_UPDATE_PRESERVE_AD (1u<<0)
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/*
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* Leaf 4 (0x40000x03)
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* Sub-leaf 0: EAX: bit 0: emulated tsc
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* bit 1: host tsc is known to be reliable
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* bit 2: RDTSCP instruction available
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* EBX: tsc_mode: 0=default (emulate if necessary), 1=emulate,
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* 2=no emulation, 3=no emulation + TSC_AUX support
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* ECX: guest tsc frequency in kHz
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* EDX: guest tsc incarnation (migration count)
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* Sub-leaf 1: EAX: tsc offset low part
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* EBX: tsc offset high part
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* ECX: multiplicator for tsc->ns conversion
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* EDX: shift amount for tsc->ns conversion
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* Sub-leaf 2: EAX: host tsc frequency in kHz
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*/
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#define XEN_CPUID_TSC_EMULATED (1u << 0)
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#define XEN_CPUID_HOST_TSC_RELIABLE (1u << 1)
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#define XEN_CPUID_RDTSCP_INSTR_AVAIL (1u << 2)
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#define XEN_CPUID_TSC_MODE_DEFAULT (0)
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#define XEN_CPUID_TSC_MODE_ALWAYS_EMULATE (1u)
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#define XEN_CPUID_TSC_MODE_NEVER_EMULATE (2u)
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#define XEN_CPUID_TSC_MODE_PVRDTSCP (3u)
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/*
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* Leaf 5 (0x40000x04)
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* HVM-specific features
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* Sub-leaf 0: EAX: Features
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* Sub-leaf 0: EBX: vcpu id (iff EAX has XEN_HVM_CPUID_VCPU_ID_PRESENT flag)
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* Sub-leaf 0: ECX: domain id (iff EAX has XEN_HVM_CPUID_DOMID_PRESENT flag)
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*/
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#define XEN_HVM_CPUID_APIC_ACCESS_VIRT (1u << 0) /* Virtualized APIC registers */
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#define XEN_HVM_CPUID_X2APIC_VIRT (1u << 1) /* Virtualized x2APIC accesses */
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/* Memory mapped from other domains has valid IOMMU entries */
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#define XEN_HVM_CPUID_IOMMU_MAPPINGS (1u << 2)
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#define XEN_HVM_CPUID_VCPU_ID_PRESENT (1u << 3) /* vcpu id is present in EBX */
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#define XEN_HVM_CPUID_DOMID_PRESENT (1u << 4) /* domid is present in ECX */
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/*
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* With interrupt format set to 0 (non-remappable) bits 55:49 from the
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* IO-APIC RTE and bits 11:5 from the MSI address can be used to store
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* high bits for the Destination ID. This expands the Destination ID
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* field from 8 to 15 bits, allowing to target APIC IDs up 32768.
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*/
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#define XEN_HVM_CPUID_EXT_DEST_ID (1u << 5)
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/*
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* Per-vCPU event channel upcalls work correctly with physical IRQs
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* bound to event channels.
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*/
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#define XEN_HVM_CPUID_UPCALL_VECTOR (1u << 6)
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/*
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* Leaf 6 (0x40000x05)
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* PV-specific parameters
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* Sub-leaf 0: EAX: max available sub-leaf
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* Sub-leaf 0: EBX: bits 0-7: max machine address width
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*/
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/* Max. address width in bits taking memory hotplug into account. */
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#define XEN_CPUID_MACHINE_ADDRESS_WIDTH_MASK (0xffu << 0)
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#define XEN_CPUID_MAX_NUM_LEAVES 5
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#endif /* __XEN_PUBLIC_ARCH_X86_CPUID_H__ */
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