241 lines
6.8 KiB
C
241 lines
6.8 KiB
C
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Intel Performance and Energy Bias Hint support.
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*
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* Copyright (C) 2019 Intel Corporation
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*
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* Author:
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* Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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*/
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#include <linux/cpuhotplug.h>
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#include <linux/cpu.h>
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#include <linux/device.h>
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#include <linux/kernel.h>
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#include <linux/string.h>
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#include <linux/syscore_ops.h>
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#include <linux/pm.h>
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#include <asm/cpu_device_id.h>
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#include <asm/cpufeature.h>
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#include <asm/msr.h>
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/**
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* DOC: overview
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*
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* The Performance and Energy Bias Hint (EPB) allows software to specify its
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* preference with respect to the power-performance tradeoffs present in the
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* processor. Generally, the EPB is expected to be set by user space (directly
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* via sysfs or with the help of the x86_energy_perf_policy tool), but there are
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* two reasons for the kernel to update it.
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*
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* First, there are systems where the platform firmware resets the EPB during
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* system-wide transitions from sleep states back into the working state
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* effectively causing the previous EPB updates by user space to be lost.
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* Thus the kernel needs to save the current EPB values for all CPUs during
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* system-wide transitions to sleep states and restore them on the way back to
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* the working state. That can be achieved by saving EPB for secondary CPUs
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* when they are taken offline during transitions into system sleep states and
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* for the boot CPU in a syscore suspend operation, so that it can be restored
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* for the boot CPU in a syscore resume operation and for the other CPUs when
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* they are brought back online. However, CPUs that are already offline when
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* a system-wide PM transition is started are not taken offline again, but their
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* EPB values may still be reset by the platform firmware during the transition,
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* so in fact it is necessary to save the EPB of any CPU taken offline and to
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* restore it when the given CPU goes back online at all times.
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*
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* Second, on many systems the initial EPB value coming from the platform
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* firmware is 0 ('performance') and at least on some of them that is because
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* the platform firmware does not initialize EPB at all with the assumption that
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* the OS will do that anyway. That sometimes is problematic, as it may cause
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* the system battery to drain too fast, for example, so it is better to adjust
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* it on CPU bring-up and if the initial EPB value for a given CPU is 0, the
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* kernel changes it to 6 ('normal').
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*/
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static DEFINE_PER_CPU(u8, saved_epb);
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#define EPB_MASK 0x0fULL
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#define EPB_SAVED 0x10ULL
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#define MAX_EPB EPB_MASK
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enum energy_perf_value_index {
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EPB_INDEX_PERFORMANCE,
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EPB_INDEX_BALANCE_PERFORMANCE,
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EPB_INDEX_NORMAL,
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EPB_INDEX_BALANCE_POWERSAVE,
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EPB_INDEX_POWERSAVE,
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};
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static u8 energ_perf_values[] = {
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[EPB_INDEX_PERFORMANCE] = ENERGY_PERF_BIAS_PERFORMANCE,
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[EPB_INDEX_BALANCE_PERFORMANCE] = ENERGY_PERF_BIAS_BALANCE_PERFORMANCE,
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[EPB_INDEX_NORMAL] = ENERGY_PERF_BIAS_NORMAL,
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[EPB_INDEX_BALANCE_POWERSAVE] = ENERGY_PERF_BIAS_BALANCE_POWERSAVE,
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[EPB_INDEX_POWERSAVE] = ENERGY_PERF_BIAS_POWERSAVE,
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};
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static int intel_epb_save(void)
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{
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u64 epb;
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rdmsrl(MSR_IA32_ENERGY_PERF_BIAS, epb);
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/*
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* Ensure that saved_epb will always be nonzero after this write even if
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* the EPB value read from the MSR is 0.
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*/
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this_cpu_write(saved_epb, (epb & EPB_MASK) | EPB_SAVED);
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return 0;
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}
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static void intel_epb_restore(void)
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{
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u64 val = this_cpu_read(saved_epb);
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u64 epb;
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rdmsrl(MSR_IA32_ENERGY_PERF_BIAS, epb);
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if (val) {
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val &= EPB_MASK;
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} else {
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/*
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* Because intel_epb_save() has not run for the current CPU yet,
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* it is going online for the first time, so if its EPB value is
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* 0 ('performance') at this point, assume that it has not been
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* initialized by the platform firmware and set it to 6
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* ('normal').
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*/
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val = epb & EPB_MASK;
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if (val == ENERGY_PERF_BIAS_PERFORMANCE) {
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val = energ_perf_values[EPB_INDEX_NORMAL];
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pr_warn_once("ENERGY_PERF_BIAS: Set to 'normal', was 'performance'\n");
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}
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}
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wrmsrl(MSR_IA32_ENERGY_PERF_BIAS, (epb & ~EPB_MASK) | val);
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}
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static struct syscore_ops intel_epb_syscore_ops = {
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.suspend = intel_epb_save,
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.resume = intel_epb_restore,
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};
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static const char * const energy_perf_strings[] = {
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[EPB_INDEX_PERFORMANCE] = "performance",
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[EPB_INDEX_BALANCE_PERFORMANCE] = "balance-performance",
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[EPB_INDEX_NORMAL] = "normal",
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[EPB_INDEX_BALANCE_POWERSAVE] = "balance-power",
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[EPB_INDEX_POWERSAVE] = "power",
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};
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static ssize_t energy_perf_bias_show(struct device *dev,
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struct device_attribute *attr,
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char *buf)
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{
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unsigned int cpu = dev->id;
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u64 epb;
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int ret;
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ret = rdmsrl_on_cpu(cpu, MSR_IA32_ENERGY_PERF_BIAS, &epb);
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if (ret < 0)
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return ret;
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return sprintf(buf, "%llu\n", epb);
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}
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static ssize_t energy_perf_bias_store(struct device *dev,
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struct device_attribute *attr,
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const char *buf, size_t count)
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{
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unsigned int cpu = dev->id;
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u64 epb, val;
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int ret;
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ret = __sysfs_match_string(energy_perf_strings,
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ARRAY_SIZE(energy_perf_strings), buf);
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if (ret >= 0)
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val = energ_perf_values[ret];
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else if (kstrtou64(buf, 0, &val) || val > MAX_EPB)
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return -EINVAL;
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ret = rdmsrl_on_cpu(cpu, MSR_IA32_ENERGY_PERF_BIAS, &epb);
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if (ret < 0)
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return ret;
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ret = wrmsrl_on_cpu(cpu, MSR_IA32_ENERGY_PERF_BIAS,
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(epb & ~EPB_MASK) | val);
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if (ret < 0)
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return ret;
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return count;
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}
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static DEVICE_ATTR_RW(energy_perf_bias);
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static struct attribute *intel_epb_attrs[] = {
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&dev_attr_energy_perf_bias.attr,
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NULL
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};
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static const struct attribute_group intel_epb_attr_group = {
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.name = power_group_name,
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.attrs = intel_epb_attrs
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};
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static int intel_epb_online(unsigned int cpu)
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{
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struct device *cpu_dev = get_cpu_device(cpu);
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intel_epb_restore();
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if (!cpuhp_tasks_frozen)
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sysfs_merge_group(&cpu_dev->kobj, &intel_epb_attr_group);
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return 0;
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}
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static int intel_epb_offline(unsigned int cpu)
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{
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struct device *cpu_dev = get_cpu_device(cpu);
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if (!cpuhp_tasks_frozen)
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sysfs_unmerge_group(&cpu_dev->kobj, &intel_epb_attr_group);
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intel_epb_save();
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return 0;
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}
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static const struct x86_cpu_id intel_epb_normal[] = {
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X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L,
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ENERGY_PERF_BIAS_NORMAL_POWERSAVE),
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X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_N,
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ENERGY_PERF_BIAS_NORMAL_POWERSAVE),
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X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_P,
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ENERGY_PERF_BIAS_NORMAL_POWERSAVE),
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{}
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};
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static __init int intel_epb_init(void)
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{
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const struct x86_cpu_id *id = x86_match_cpu(intel_epb_normal);
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int ret;
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if (!boot_cpu_has(X86_FEATURE_EPB))
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return -ENODEV;
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if (id)
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energ_perf_values[EPB_INDEX_NORMAL] = id->driver_data;
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ret = cpuhp_setup_state(CPUHP_AP_X86_INTEL_EPB_ONLINE,
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"x86/intel/epb:online", intel_epb_online,
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intel_epb_offline);
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if (ret < 0)
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goto err_out_online;
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register_syscore_ops(&intel_epb_syscore_ops);
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return 0;
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err_out_online:
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cpuhp_remove_state(CPUHP_AP_X86_INTEL_EPB_ONLINE);
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return ret;
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}
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subsys_initcall(intel_epb_init);
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