489 lines
12 KiB
C
489 lines
12 KiB
C
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// SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0-only)
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/* Copyright(c) 2020 Intel Corporation */
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#include <linux/device.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <adf_accel_devices.h>
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#include <adf_cfg.h>
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#include <adf_common_drv.h>
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#include <adf_dbgfs.h>
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#include "adf_4xxx_hw_data.h"
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#include "qat_compression.h"
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#include "qat_crypto.h"
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#include "adf_transport_access_macros.h"
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static const struct pci_device_id adf_pci_tbl[] = {
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{ PCI_VDEVICE(INTEL, ADF_4XXX_PCI_DEVICE_ID), },
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{ PCI_VDEVICE(INTEL, ADF_401XX_PCI_DEVICE_ID), },
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{ PCI_VDEVICE(INTEL, ADF_402XX_PCI_DEVICE_ID), },
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{ }
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};
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MODULE_DEVICE_TABLE(pci, adf_pci_tbl);
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enum configs {
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DEV_CFG_CY = 0,
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DEV_CFG_DC,
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DEV_CFG_SYM,
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DEV_CFG_ASYM,
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DEV_CFG_ASYM_SYM,
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DEV_CFG_ASYM_DC,
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DEV_CFG_DC_ASYM,
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DEV_CFG_SYM_DC,
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DEV_CFG_DC_SYM,
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};
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static const char * const services_operations[] = {
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ADF_CFG_CY,
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ADF_CFG_DC,
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ADF_CFG_SYM,
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ADF_CFG_ASYM,
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ADF_CFG_ASYM_SYM,
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ADF_CFG_ASYM_DC,
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ADF_CFG_DC_ASYM,
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ADF_CFG_SYM_DC,
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ADF_CFG_DC_SYM,
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};
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static void adf_cleanup_accel(struct adf_accel_dev *accel_dev)
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{
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if (accel_dev->hw_device) {
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adf_clean_hw_data_4xxx(accel_dev->hw_device);
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accel_dev->hw_device = NULL;
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}
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adf_dbgfs_exit(accel_dev);
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adf_cfg_dev_remove(accel_dev);
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adf_devmgr_rm_dev(accel_dev, NULL);
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}
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static int adf_cfg_dev_init(struct adf_accel_dev *accel_dev)
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{
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const char *config;
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int ret;
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config = accel_dev->accel_id % 2 ? ADF_CFG_DC : ADF_CFG_CY;
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ret = adf_cfg_section_add(accel_dev, ADF_GENERAL_SEC);
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if (ret)
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return ret;
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/* Default configuration is crypto only for even devices
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* and compression for odd devices
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*/
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ret = adf_cfg_add_key_value_param(accel_dev, ADF_GENERAL_SEC,
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ADF_SERVICES_ENABLED, config,
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ADF_STR);
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if (ret)
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return ret;
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return 0;
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}
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static int adf_crypto_dev_config(struct adf_accel_dev *accel_dev)
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{
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char key[ADF_CFG_MAX_KEY_LEN_IN_BYTES];
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int banks = GET_MAX_BANKS(accel_dev);
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int cpus = num_online_cpus();
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unsigned long bank, val;
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int instances;
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int ret;
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int i;
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if (adf_hw_dev_has_crypto(accel_dev))
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instances = min(cpus, banks / 2);
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else
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instances = 0;
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for (i = 0; i < instances; i++) {
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val = i;
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bank = i * 2;
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snprintf(key, sizeof(key), ADF_CY "%d" ADF_RING_ASYM_BANK_NUM, i);
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ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
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key, &bank, ADF_DEC);
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if (ret)
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goto err;
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bank += 1;
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snprintf(key, sizeof(key), ADF_CY "%d" ADF_RING_SYM_BANK_NUM, i);
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ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
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key, &bank, ADF_DEC);
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if (ret)
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goto err;
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snprintf(key, sizeof(key), ADF_CY "%d" ADF_ETRMGR_CORE_AFFINITY,
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i);
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ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
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key, &val, ADF_DEC);
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if (ret)
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goto err;
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snprintf(key, sizeof(key), ADF_CY "%d" ADF_RING_ASYM_SIZE, i);
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val = 128;
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ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
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key, &val, ADF_DEC);
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if (ret)
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goto err;
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val = 512;
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snprintf(key, sizeof(key), ADF_CY "%d" ADF_RING_SYM_SIZE, i);
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ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
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key, &val, ADF_DEC);
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if (ret)
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goto err;
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val = 0;
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snprintf(key, sizeof(key), ADF_CY "%d" ADF_RING_ASYM_TX, i);
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ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
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key, &val, ADF_DEC);
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if (ret)
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goto err;
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val = 0;
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snprintf(key, sizeof(key), ADF_CY "%d" ADF_RING_SYM_TX, i);
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ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
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key, &val, ADF_DEC);
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if (ret)
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goto err;
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val = 1;
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snprintf(key, sizeof(key), ADF_CY "%d" ADF_RING_ASYM_RX, i);
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ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
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key, &val, ADF_DEC);
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if (ret)
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goto err;
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val = 1;
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snprintf(key, sizeof(key), ADF_CY "%d" ADF_RING_SYM_RX, i);
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ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
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key, &val, ADF_DEC);
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if (ret)
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goto err;
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val = ADF_COALESCING_DEF_TIME;
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snprintf(key, sizeof(key), ADF_ETRMGR_COALESCE_TIMER_FORMAT, i);
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ret = adf_cfg_add_key_value_param(accel_dev, "Accelerator0",
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key, &val, ADF_DEC);
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if (ret)
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goto err;
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}
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val = i;
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ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC, ADF_NUM_CY,
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&val, ADF_DEC);
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if (ret)
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goto err;
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val = 0;
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ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC, ADF_NUM_DC,
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&val, ADF_DEC);
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if (ret)
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goto err;
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return 0;
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err:
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dev_err(&GET_DEV(accel_dev), "Failed to add configuration for crypto\n");
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return ret;
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}
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static int adf_comp_dev_config(struct adf_accel_dev *accel_dev)
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{
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char key[ADF_CFG_MAX_KEY_LEN_IN_BYTES];
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int banks = GET_MAX_BANKS(accel_dev);
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int cpus = num_online_cpus();
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unsigned long val;
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int instances;
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int ret;
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int i;
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if (adf_hw_dev_has_compression(accel_dev))
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instances = min(cpus, banks);
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else
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instances = 0;
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for (i = 0; i < instances; i++) {
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val = i;
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snprintf(key, sizeof(key), ADF_DC "%d" ADF_RING_DC_BANK_NUM, i);
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ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
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key, &val, ADF_DEC);
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if (ret)
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goto err;
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val = 512;
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snprintf(key, sizeof(key), ADF_DC "%d" ADF_RING_DC_SIZE, i);
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ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
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key, &val, ADF_DEC);
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if (ret)
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goto err;
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val = 0;
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snprintf(key, sizeof(key), ADF_DC "%d" ADF_RING_DC_TX, i);
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ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
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key, &val, ADF_DEC);
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if (ret)
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goto err;
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val = 1;
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snprintf(key, sizeof(key), ADF_DC "%d" ADF_RING_DC_RX, i);
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ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
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key, &val, ADF_DEC);
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if (ret)
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goto err;
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val = ADF_COALESCING_DEF_TIME;
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snprintf(key, sizeof(key), ADF_ETRMGR_COALESCE_TIMER_FORMAT, i);
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ret = adf_cfg_add_key_value_param(accel_dev, "Accelerator0",
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key, &val, ADF_DEC);
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if (ret)
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goto err;
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}
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val = i;
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ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC, ADF_NUM_DC,
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&val, ADF_DEC);
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if (ret)
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goto err;
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val = 0;
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ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC, ADF_NUM_CY,
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&val, ADF_DEC);
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if (ret)
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goto err;
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return 0;
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err:
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dev_err(&GET_DEV(accel_dev), "Failed to add configuration for compression\n");
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return ret;
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}
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static int adf_no_dev_config(struct adf_accel_dev *accel_dev)
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{
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unsigned long val;
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int ret;
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val = 0;
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ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC, ADF_NUM_DC,
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&val, ADF_DEC);
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if (ret)
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return ret;
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return adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC, ADF_NUM_CY,
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&val, ADF_DEC);
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}
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int adf_gen4_dev_config(struct adf_accel_dev *accel_dev)
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{
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char services[ADF_CFG_MAX_VAL_LEN_IN_BYTES] = {0};
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int ret;
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ret = adf_cfg_section_add(accel_dev, ADF_KERNEL_SEC);
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if (ret)
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goto err;
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ret = adf_cfg_section_add(accel_dev, "Accelerator0");
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if (ret)
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goto err;
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ret = adf_cfg_get_param_value(accel_dev, ADF_GENERAL_SEC,
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ADF_SERVICES_ENABLED, services);
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if (ret)
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goto err;
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ret = sysfs_match_string(services_operations, services);
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if (ret < 0)
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goto err;
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switch (ret) {
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case DEV_CFG_CY:
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case DEV_CFG_ASYM_SYM:
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ret = adf_crypto_dev_config(accel_dev);
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break;
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case DEV_CFG_DC:
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ret = adf_comp_dev_config(accel_dev);
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break;
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default:
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ret = adf_no_dev_config(accel_dev);
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break;
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}
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if (ret)
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goto err;
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set_bit(ADF_STATUS_CONFIGURED, &accel_dev->status);
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return ret;
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err:
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dev_err(&GET_DEV(accel_dev), "Failed to configure QAT driver\n");
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return ret;
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}
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static int adf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
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{
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struct adf_accel_dev *accel_dev;
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struct adf_accel_pci *accel_pci_dev;
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struct adf_hw_device_data *hw_data;
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unsigned int i, bar_nr;
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unsigned long bar_mask;
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struct adf_bar *bar;
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int ret;
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if (num_possible_nodes() > 1 && dev_to_node(&pdev->dev) < 0) {
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/*
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* If the accelerator is connected to a node with no memory
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* there is no point in using the accelerator since the remote
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* memory transaction will be very slow.
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*/
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dev_err(&pdev->dev, "Invalid NUMA configuration.\n");
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return -EINVAL;
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}
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accel_dev = devm_kzalloc(&pdev->dev, sizeof(*accel_dev), GFP_KERNEL);
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if (!accel_dev)
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return -ENOMEM;
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INIT_LIST_HEAD(&accel_dev->crypto_list);
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accel_pci_dev = &accel_dev->accel_pci_dev;
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accel_pci_dev->pci_dev = pdev;
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/*
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* Add accel device to accel table
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* This should be called before adf_cleanup_accel is called
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*/
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if (adf_devmgr_add_dev(accel_dev, NULL)) {
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dev_err(&pdev->dev, "Failed to add new accelerator device.\n");
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return -EFAULT;
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}
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accel_dev->owner = THIS_MODULE;
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/* Allocate and initialise device hardware meta-data structure */
|
||
|
|
hw_data = devm_kzalloc(&pdev->dev, sizeof(*hw_data), GFP_KERNEL);
|
||
|
|
if (!hw_data) {
|
||
|
|
ret = -ENOMEM;
|
||
|
|
goto out_err;
|
||
|
|
}
|
||
|
|
|
||
|
|
accel_dev->hw_device = hw_data;
|
||
|
|
adf_init_hw_data_4xxx(accel_dev->hw_device, ent->device);
|
||
|
|
|
||
|
|
pci_read_config_byte(pdev, PCI_REVISION_ID, &accel_pci_dev->revid);
|
||
|
|
pci_read_config_dword(pdev, ADF_4XXX_FUSECTL4_OFFSET, &hw_data->fuses);
|
||
|
|
|
||
|
|
/* Get Accelerators and Accelerators Engines masks */
|
||
|
|
hw_data->accel_mask = hw_data->get_accel_mask(hw_data);
|
||
|
|
hw_data->ae_mask = hw_data->get_ae_mask(hw_data);
|
||
|
|
accel_pci_dev->sku = hw_data->get_sku(hw_data);
|
||
|
|
/* If the device has no acceleration engines then ignore it */
|
||
|
|
if (!hw_data->accel_mask || !hw_data->ae_mask ||
|
||
|
|
(~hw_data->ae_mask & 0x01)) {
|
||
|
|
dev_err(&pdev->dev, "No acceleration units found.\n");
|
||
|
|
ret = -EFAULT;
|
||
|
|
goto out_err;
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Create device configuration table */
|
||
|
|
ret = adf_cfg_dev_add(accel_dev);
|
||
|
|
if (ret)
|
||
|
|
goto out_err;
|
||
|
|
|
||
|
|
/* Enable PCI device */
|
||
|
|
ret = pcim_enable_device(pdev);
|
||
|
|
if (ret) {
|
||
|
|
dev_err(&pdev->dev, "Can't enable PCI device.\n");
|
||
|
|
goto out_err;
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Set DMA identifier */
|
||
|
|
ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
|
||
|
|
if (ret) {
|
||
|
|
dev_err(&pdev->dev, "No usable DMA configuration.\n");
|
||
|
|
goto out_err;
|
||
|
|
}
|
||
|
|
|
||
|
|
ret = adf_cfg_dev_init(accel_dev);
|
||
|
|
if (ret) {
|
||
|
|
dev_err(&pdev->dev, "Failed to initialize configuration.\n");
|
||
|
|
goto out_err;
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Get accelerator capabilities mask */
|
||
|
|
hw_data->accel_capabilities_mask = hw_data->get_accel_cap(accel_dev);
|
||
|
|
if (!hw_data->accel_capabilities_mask) {
|
||
|
|
dev_err(&pdev->dev, "Failed to get capabilities mask.\n");
|
||
|
|
ret = -EINVAL;
|
||
|
|
goto out_err;
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Find and map all the device's BARS */
|
||
|
|
bar_mask = pci_select_bars(pdev, IORESOURCE_MEM) & ADF_4XXX_BAR_MASK;
|
||
|
|
|
||
|
|
ret = pcim_iomap_regions_request_all(pdev, bar_mask, pci_name(pdev));
|
||
|
|
if (ret) {
|
||
|
|
dev_err(&pdev->dev, "Failed to map pci regions.\n");
|
||
|
|
goto out_err;
|
||
|
|
}
|
||
|
|
|
||
|
|
i = 0;
|
||
|
|
for_each_set_bit(bar_nr, &bar_mask, PCI_STD_NUM_BARS) {
|
||
|
|
bar = &accel_pci_dev->pci_bars[i++];
|
||
|
|
bar->virt_addr = pcim_iomap_table(pdev)[bar_nr];
|
||
|
|
}
|
||
|
|
|
||
|
|
pci_set_master(pdev);
|
||
|
|
|
||
|
|
if (pci_save_state(pdev)) {
|
||
|
|
dev_err(&pdev->dev, "Failed to save pci state.\n");
|
||
|
|
ret = -ENOMEM;
|
||
|
|
goto out_err;
|
||
|
|
}
|
||
|
|
|
||
|
|
adf_dbgfs_init(accel_dev);
|
||
|
|
|
||
|
|
ret = adf_dev_up(accel_dev, true);
|
||
|
|
if (ret)
|
||
|
|
goto out_err_dev_stop;
|
||
|
|
|
||
|
|
ret = adf_sysfs_init(accel_dev);
|
||
|
|
if (ret)
|
||
|
|
goto out_err_dev_stop;
|
||
|
|
|
||
|
|
return ret;
|
||
|
|
|
||
|
|
out_err_dev_stop:
|
||
|
|
adf_dev_down(accel_dev, false);
|
||
|
|
out_err:
|
||
|
|
adf_cleanup_accel(accel_dev);
|
||
|
|
return ret;
|
||
|
|
}
|
||
|
|
|
||
|
|
static void adf_remove(struct pci_dev *pdev)
|
||
|
|
{
|
||
|
|
struct adf_accel_dev *accel_dev = adf_devmgr_pci_to_accel_dev(pdev);
|
||
|
|
|
||
|
|
if (!accel_dev) {
|
||
|
|
pr_err("QAT: Driver removal failed\n");
|
||
|
|
return;
|
||
|
|
}
|
||
|
|
adf_dev_down(accel_dev, false);
|
||
|
|
adf_cleanup_accel(accel_dev);
|
||
|
|
}
|
||
|
|
|
||
|
|
static struct pci_driver adf_driver = {
|
||
|
|
.id_table = adf_pci_tbl,
|
||
|
|
.name = ADF_4XXX_DEVICE_NAME,
|
||
|
|
.probe = adf_probe,
|
||
|
|
.remove = adf_remove,
|
||
|
|
.sriov_configure = adf_sriov_configure,
|
||
|
|
.err_handler = &adf_err_handler,
|
||
|
|
};
|
||
|
|
|
||
|
|
module_pci_driver(adf_driver);
|
||
|
|
|
||
|
|
MODULE_LICENSE("Dual BSD/GPL");
|
||
|
|
MODULE_AUTHOR("Intel");
|
||
|
|
MODULE_FIRMWARE(ADF_4XXX_FW);
|
||
|
|
MODULE_FIRMWARE(ADF_4XXX_MMP);
|
||
|
|
MODULE_DESCRIPTION("Intel(R) QuickAssist Technology");
|
||
|
|
MODULE_VERSION(ADF_DRV_VERSION);
|
||
|
|
MODULE_SOFTDEP("pre: crypto-intel_qat");
|