260 lines
8.5 KiB
C
260 lines
8.5 KiB
C
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/* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0-only) */
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/* Copyright(c) 2015 - 2021 Intel Corporation */
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#ifndef ADF_PFVF_MSG_H
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#define ADF_PFVF_MSG_H
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#include <linux/bits.h>
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/*
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* PF<->VF Gen2 Messaging format
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*
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* The PF has an array of 32-bit PF2VF registers, one for each VF. The
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* PF can access all these registers while each VF can access only the one
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* register associated with that particular VF.
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*
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* The register functionally is split into two parts:
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* The bottom half is for PF->VF messages. In particular when the first
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* bit of this register (bit 0) gets set an interrupt will be triggered
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* in the respective VF.
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* The top half is for VF->PF messages. In particular when the first bit
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* of this half of register (bit 16) gets set an interrupt will be triggered
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* in the PF.
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*
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* The remaining bits within this register are available to encode messages.
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* and implement a collision control mechanism to prevent concurrent use of
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* the PF2VF register by both the PF and VF.
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*
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* 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
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* _______________________________________________
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* | | | | | | | | | | | | | | | | |
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* +-----------------------------------------------+
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* \___________________________/ \_________/ ^ ^
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* ^ ^ | |
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* | | | VF2PF Int
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* | | Message Origin
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* | Message Type
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* Message-specific Data/Reserved
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*
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* 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
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* _______________________________________________
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* | | | | | | | | | | | | | | | | |
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* +-----------------------------------------------+
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* \___________________________/ \_________/ ^ ^
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* ^ ^ | |
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* | | | PF2VF Int
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* | | Message Origin
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* | Message Type
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* Message-specific Data/Reserved
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*
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* Message Origin (Should always be 1)
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* A legacy out-of-tree QAT driver allowed for a set of messages not supported
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* by this driver; these had a Msg Origin of 0 and are ignored by this driver.
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*
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* When a PF or VF attempts to send a message in the lower or upper 16 bits,
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* respectively, the other 16 bits are written to first with a defined
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* IN_USE_BY pattern as part of a collision control scheme (see function
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* adf_gen2_pfvf_send() in adf_pf2vf_msg.c).
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*
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*
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* PF<->VF Gen4 Messaging format
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*
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* Similarly to the gen2 messaging format, 32-bit long registers are used for
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* communication between PF and VFs. However, each VF and PF share a pair of
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* 32-bits register to avoid collisions: one for PV to VF messages and one
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* for VF to PF messages.
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*
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* Both the Interrupt bit and the Message Origin bit retain the same position
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* and meaning, although non-system messages are now deprecated and not
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* expected.
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*
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* 31 30 9 8 7 6 5 4 3 2 1 0
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* _______________________________________________
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* | | | . . . | | | | | | | | | | |
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* +-----------------------------------------------+
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* \_____________________/ \_______________/ ^ ^
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* ^ ^ | |
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* | | | PF/VF Int
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* | | Message Origin
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* | Message Type
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* Message-specific Data/Reserved
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*
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* For both formats, the message reception is acknowledged by lowering the
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* interrupt bit on the register where the message was sent.
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*/
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/* PFVF message common bits */
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#define ADF_PFVF_INT BIT(0)
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#define ADF_PFVF_MSGORIGIN_SYSTEM BIT(1)
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/* Different generations have different CSR layouts, use this struct
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* to abstract these differences away
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*/
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struct pfvf_message {
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u8 type;
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u32 data;
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};
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/* PF->VF messages */
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enum pf2vf_msgtype {
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ADF_PF2VF_MSGTYPE_RESTARTING = 0x01,
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ADF_PF2VF_MSGTYPE_VERSION_RESP = 0x02,
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ADF_PF2VF_MSGTYPE_BLKMSG_RESP = 0x03,
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/* Values from 0x10 are Gen4 specific, message type is only 4 bits in Gen2 devices. */
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ADF_PF2VF_MSGTYPE_RP_RESET_RESP = 0x10,
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};
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/* VF->PF messages */
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enum vf2pf_msgtype {
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ADF_VF2PF_MSGTYPE_INIT = 0x03,
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ADF_VF2PF_MSGTYPE_SHUTDOWN = 0x04,
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ADF_VF2PF_MSGTYPE_VERSION_REQ = 0x05,
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ADF_VF2PF_MSGTYPE_COMPAT_VER_REQ = 0x06,
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ADF_VF2PF_MSGTYPE_LARGE_BLOCK_REQ = 0x07,
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ADF_VF2PF_MSGTYPE_MEDIUM_BLOCK_REQ = 0x08,
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ADF_VF2PF_MSGTYPE_SMALL_BLOCK_REQ = 0x09,
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/* Values from 0x10 are Gen4 specific, message type is only 4 bits in Gen2 devices. */
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ADF_VF2PF_MSGTYPE_RP_RESET = 0x10,
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};
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/* VF/PF compatibility version. */
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enum pfvf_compatibility_version {
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/* Support for extended capabilities */
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ADF_PFVF_COMPAT_CAPABILITIES = 0x02,
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/* In-use pattern cleared by receiver */
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ADF_PFVF_COMPAT_FAST_ACK = 0x03,
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/* Ring to service mapping support for non-standard mappings */
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ADF_PFVF_COMPAT_RING_TO_SVC_MAP = 0x04,
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/* Reference to the latest version */
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ADF_PFVF_COMPAT_THIS_VERSION = 0x04,
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};
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/* PF->VF Version Response */
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#define ADF_PF2VF_VERSION_RESP_VERS_MASK GENMASK(7, 0)
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#define ADF_PF2VF_VERSION_RESP_RESULT_MASK GENMASK(9, 8)
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enum pf2vf_compat_response {
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ADF_PF2VF_VF_COMPATIBLE = 0x01,
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ADF_PF2VF_VF_INCOMPATIBLE = 0x02,
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ADF_PF2VF_VF_COMPAT_UNKNOWN = 0x03,
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};
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enum ring_reset_result {
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RPRESET_SUCCESS = 0x00,
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RPRESET_NOT_SUPPORTED = 0x01,
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RPRESET_INVAL_BANK = 0x02,
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RPRESET_TIMEOUT = 0x03,
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};
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#define ADF_VF2PF_RNG_RESET_RP_MASK GENMASK(1, 0)
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#define ADF_VF2PF_RNG_RESET_RSVD_MASK GENMASK(25, 2)
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/* PF->VF Block Responses */
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#define ADF_PF2VF_BLKMSG_RESP_TYPE_MASK GENMASK(1, 0)
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#define ADF_PF2VF_BLKMSG_RESP_DATA_MASK GENMASK(9, 2)
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enum pf2vf_blkmsg_resp_type {
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ADF_PF2VF_BLKMSG_RESP_TYPE_DATA = 0x00,
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ADF_PF2VF_BLKMSG_RESP_TYPE_CRC = 0x01,
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ADF_PF2VF_BLKMSG_RESP_TYPE_ERROR = 0x02,
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};
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/* PF->VF Block Error Code */
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enum pf2vf_blkmsg_error {
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ADF_PF2VF_INVALID_BLOCK_TYPE = 0x00,
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ADF_PF2VF_INVALID_BYTE_NUM_REQ = 0x01,
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ADF_PF2VF_PAYLOAD_TRUNCATED = 0x02,
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ADF_PF2VF_UNSPECIFIED_ERROR = 0x03,
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};
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/* VF->PF Block Requests */
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#define ADF_VF2PF_LARGE_BLOCK_TYPE_MASK GENMASK(1, 0)
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#define ADF_VF2PF_LARGE_BLOCK_BYTE_MASK GENMASK(8, 2)
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#define ADF_VF2PF_MEDIUM_BLOCK_TYPE_MASK GENMASK(2, 0)
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#define ADF_VF2PF_MEDIUM_BLOCK_BYTE_MASK GENMASK(8, 3)
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#define ADF_VF2PF_SMALL_BLOCK_TYPE_MASK GENMASK(3, 0)
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#define ADF_VF2PF_SMALL_BLOCK_BYTE_MASK GENMASK(8, 4)
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#define ADF_VF2PF_BLOCK_CRC_REQ_MASK BIT(9)
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/* PF->VF Block Request Types
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* 0..15 - 32 byte message
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* 16..23 - 64 byte message
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* 24..27 - 128 byte message
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*/
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enum vf2pf_blkmsg_req_type {
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ADF_VF2PF_BLKMSG_REQ_CAP_SUMMARY = 0x02,
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ADF_VF2PF_BLKMSG_REQ_RING_SVC_MAP = 0x03,
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};
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#define ADF_VF2PF_SMALL_BLOCK_TYPE_MAX \
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(FIELD_MAX(ADF_VF2PF_SMALL_BLOCK_TYPE_MASK))
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#define ADF_VF2PF_MEDIUM_BLOCK_TYPE_MAX \
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(FIELD_MAX(ADF_VF2PF_MEDIUM_BLOCK_TYPE_MASK) + \
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ADF_VF2PF_SMALL_BLOCK_TYPE_MAX + 1)
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#define ADF_VF2PF_LARGE_BLOCK_TYPE_MAX \
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(FIELD_MAX(ADF_VF2PF_LARGE_BLOCK_TYPE_MASK) + \
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ADF_VF2PF_MEDIUM_BLOCK_TYPE_MAX)
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#define ADF_VF2PF_SMALL_BLOCK_BYTE_MAX \
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FIELD_MAX(ADF_VF2PF_SMALL_BLOCK_BYTE_MASK)
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#define ADF_VF2PF_MEDIUM_BLOCK_BYTE_MAX \
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FIELD_MAX(ADF_VF2PF_MEDIUM_BLOCK_BYTE_MASK)
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#define ADF_VF2PF_LARGE_BLOCK_BYTE_MAX \
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FIELD_MAX(ADF_VF2PF_LARGE_BLOCK_BYTE_MASK)
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struct pfvf_blkmsg_header {
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u8 version;
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u8 payload_size;
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} __packed;
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#define ADF_PFVF_BLKMSG_HEADER_SIZE (sizeof(struct pfvf_blkmsg_header))
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#define ADF_PFVF_BLKMSG_PAYLOAD_SIZE(blkmsg) (sizeof(blkmsg) - \
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ADF_PFVF_BLKMSG_HEADER_SIZE)
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#define ADF_PFVF_BLKMSG_MSG_SIZE(blkmsg) (ADF_PFVF_BLKMSG_HEADER_SIZE + \
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(blkmsg)->hdr.payload_size)
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#define ADF_PFVF_BLKMSG_MSG_MAX_SIZE 128
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/* PF->VF Block message header bytes */
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#define ADF_PFVF_BLKMSG_VER_BYTE 0
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#define ADF_PFVF_BLKMSG_LEN_BYTE 1
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/* PF/VF Capabilities message values */
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enum blkmsg_capabilities_versions {
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ADF_PFVF_CAPABILITIES_V1_VERSION = 0x01,
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ADF_PFVF_CAPABILITIES_V2_VERSION = 0x02,
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ADF_PFVF_CAPABILITIES_V3_VERSION = 0x03,
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};
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struct capabilities_v1 {
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struct pfvf_blkmsg_header hdr;
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u32 ext_dc_caps;
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} __packed;
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struct capabilities_v2 {
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struct pfvf_blkmsg_header hdr;
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u32 ext_dc_caps;
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u32 capabilities;
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} __packed;
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struct capabilities_v3 {
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struct pfvf_blkmsg_header hdr;
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u32 ext_dc_caps;
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u32 capabilities;
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u32 frequency;
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} __packed;
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/* PF/VF Ring to service mapping values */
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enum blkmsg_ring_to_svc_versions {
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ADF_PFVF_RING_TO_SVC_VERSION = 0x01,
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};
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struct ring_to_svc_map_v1 {
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struct pfvf_blkmsg_header hdr;
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u16 map;
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} __packed;
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#endif /* ADF_PFVF_MSG_H */
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