2023-08-30 17:31:07 +02:00
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/*
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* Copyright 2018 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#ifndef __AMDGPU_GEM_H__
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#define __AMDGPU_GEM_H__
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#include <drm/amdgpu_drm.h>
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#include <drm/drm_gem.h>
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/*
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* GEM.
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*/
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#define AMDGPU_GEM_DOMAIN_MAX 0x3
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#define gem_to_amdgpu_bo(gobj) container_of((gobj), struct amdgpu_bo, tbo.base)
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unsigned long amdgpu_gem_timeout(uint64_t timeout_ns);
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/*
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* GEM objects.
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*/
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void amdgpu_gem_force_release(struct amdgpu_device *adev);
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int amdgpu_gem_object_create(struct amdgpu_device *adev, unsigned long size,
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int alignment, u32 initial_domain,
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u64 flags, enum ttm_bo_type type,
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struct dma_resv *resv,
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2023-10-24 12:59:35 +02:00
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struct drm_gem_object **obj, int8_t xcp_id_plus1);
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2023-08-30 17:31:07 +02:00
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int amdgpu_mode_dumb_create(struct drm_file *file_priv,
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struct drm_device *dev,
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struct drm_mode_create_dumb *args);
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int amdgpu_mode_dumb_mmap(struct drm_file *filp,
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struct drm_device *dev,
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uint32_t handle, uint64_t *offset_p);
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int amdgpu_gem_create_ioctl(struct drm_device *dev, void *data,
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struct drm_file *filp);
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int amdgpu_gem_info_ioctl(struct drm_device *dev, void *data,
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struct drm_file *filp);
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int amdgpu_gem_userptr_ioctl(struct drm_device *dev, void *data,
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struct drm_file *filp);
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int amdgpu_gem_mmap_ioctl(struct drm_device *dev, void *data,
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struct drm_file *filp);
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int amdgpu_gem_wait_idle_ioctl(struct drm_device *dev, void *data,
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struct drm_file *filp);
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uint64_t amdgpu_gem_va_map_flags(struct amdgpu_device *adev, uint32_t flags);
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int amdgpu_gem_va_ioctl(struct drm_device *dev, void *data,
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struct drm_file *filp);
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int amdgpu_gem_op_ioctl(struct drm_device *dev, void *data,
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struct drm_file *filp);
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int amdgpu_gem_metadata_ioctl(struct drm_device *dev, void *data,
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struct drm_file *filp);
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#endif
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