2023-08-30 17:31:07 +02:00
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/*
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* Copyright 2014 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include "kfd_priv.h"
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#include "kfd_events.h"
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#include "cik_int.h"
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#include "amdgpu_amdkfd.h"
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#include "kfd_smi_events.h"
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2023-10-24 12:59:35 +02:00
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static bool cik_event_interrupt_isr(struct kfd_node *dev,
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2023-08-30 17:31:07 +02:00
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const uint32_t *ih_ring_entry,
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uint32_t *patched_ihre,
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bool *patched_flag)
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{
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const struct cik_ih_ring_entry *ihre =
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(const struct cik_ih_ring_entry *)ih_ring_entry;
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const struct kfd2kgd_calls *f2g = dev->kfd2kgd;
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unsigned int vmid;
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uint16_t pasid;
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bool ret;
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/* This workaround is due to HW/FW limitation on Hawaii that
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* VMID and PASID are not written into ih_ring_entry
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*/
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if ((ihre->source_id == CIK_INTSRC_GFX_PAGE_INV_FAULT ||
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ihre->source_id == CIK_INTSRC_GFX_MEM_PROT_FAULT) &&
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dev->adev->asic_type == CHIP_HAWAII) {
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struct cik_ih_ring_entry *tmp_ihre =
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(struct cik_ih_ring_entry *)patched_ihre;
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*patched_flag = true;
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*tmp_ihre = *ihre;
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vmid = f2g->read_vmid_from_vmfault_reg(dev->adev);
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ret = f2g->get_atc_vmid_pasid_mapping_info(dev->adev, vmid, &pasid);
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tmp_ihre->ring_id &= 0x000000ff;
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tmp_ihre->ring_id |= vmid << 8;
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tmp_ihre->ring_id |= pasid << 16;
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return ret && (pasid != 0) &&
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vmid >= dev->vm_info.first_vmid_kfd &&
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vmid <= dev->vm_info.last_vmid_kfd;
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}
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/* Only handle interrupts from KFD VMIDs */
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vmid = (ihre->ring_id & 0x0000ff00) >> 8;
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if (vmid < dev->vm_info.first_vmid_kfd ||
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vmid > dev->vm_info.last_vmid_kfd)
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return false;
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/* If there is no valid PASID, it's likely a firmware bug */
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pasid = (ihre->ring_id & 0xffff0000) >> 16;
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if (WARN_ONCE(pasid == 0, "FW bug: No PASID in KFD interrupt"))
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return false;
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/* Interrupt types we care about: various signals and faults.
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* They will be forwarded to a work queue (see below).
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*/
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return ihre->source_id == CIK_INTSRC_CP_END_OF_PIPE ||
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ihre->source_id == CIK_INTSRC_SDMA_TRAP ||
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ihre->source_id == CIK_INTSRC_SQ_INTERRUPT_MSG ||
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ihre->source_id == CIK_INTSRC_CP_BAD_OPCODE ||
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((ihre->source_id == CIK_INTSRC_GFX_PAGE_INV_FAULT ||
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ihre->source_id == CIK_INTSRC_GFX_MEM_PROT_FAULT) &&
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!amdgpu_no_queue_eviction_on_vm_fault);
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}
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2023-10-24 12:59:35 +02:00
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static void cik_event_interrupt_wq(struct kfd_node *dev,
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2023-08-30 17:31:07 +02:00
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const uint32_t *ih_ring_entry)
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{
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const struct cik_ih_ring_entry *ihre =
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(const struct cik_ih_ring_entry *)ih_ring_entry;
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uint32_t context_id = ihre->data & 0xfffffff;
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unsigned int vmid = (ihre->ring_id & 0x0000ff00) >> 8;
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u32 pasid = (ihre->ring_id & 0xffff0000) >> 16;
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if (pasid == 0)
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return;
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if (ihre->source_id == CIK_INTSRC_CP_END_OF_PIPE)
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kfd_signal_event_interrupt(pasid, context_id, 28);
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else if (ihre->source_id == CIK_INTSRC_SDMA_TRAP)
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kfd_signal_event_interrupt(pasid, context_id, 28);
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else if (ihre->source_id == CIK_INTSRC_SQ_INTERRUPT_MSG)
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kfd_signal_event_interrupt(pasid, context_id & 0xff, 8);
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else if (ihre->source_id == CIK_INTSRC_CP_BAD_OPCODE)
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kfd_signal_hw_exception_event(pasid);
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else if (ihre->source_id == CIK_INTSRC_GFX_PAGE_INV_FAULT ||
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ihre->source_id == CIK_INTSRC_GFX_MEM_PROT_FAULT) {
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struct kfd_vm_fault_info info;
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kfd_smi_event_update_vmfault(dev, pasid);
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kfd_dqm_evict_pasid(dev->dqm, pasid);
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memset(&info, 0, sizeof(info));
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amdgpu_amdkfd_gpuvm_get_vm_fault_info(dev->adev, &info);
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if (!info.page_addr && !info.status)
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return;
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if (info.vmid == vmid)
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2023-10-24 12:59:35 +02:00
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kfd_signal_vm_fault_event(dev, pasid, &info, NULL);
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2023-08-30 17:31:07 +02:00
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else
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2023-10-24 12:59:35 +02:00
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kfd_signal_vm_fault_event(dev, pasid, NULL, NULL);
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2023-08-30 17:31:07 +02:00
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}
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}
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const struct kfd_event_interrupt_class event_interrupt_class_cik = {
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.interrupt_isr = cik_event_interrupt_isr,
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.interrupt_wq = cik_event_interrupt_wq,
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};
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