95 lines
2.3 KiB
C
95 lines
2.3 KiB
C
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// SPDX-License-Identifier: MIT
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/*
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* Copyright © 2022 Intel Corporation
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*/
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#include "gt/intel_engine_regs.h"
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#include "i915_drv.h"
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#include "i915_gem.h"
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#include "i915_ioctl.h"
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#include "i915_reg.h"
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#include "intel_runtime_pm.h"
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#include "intel_uncore.h"
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/*
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* This file is for small ioctl functions that are out of place everywhere else,
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* and not big enough to warrant a file of their own.
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*
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* This is not the dumping ground for random ioctls.
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*/
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struct reg_whitelist {
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i915_reg_t offset_ldw;
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i915_reg_t offset_udw;
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u8 min_graphics_ver;
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u8 max_graphics_ver;
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u8 size;
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};
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static const struct reg_whitelist reg_read_whitelist[] = {
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{
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.offset_ldw = RING_TIMESTAMP(RENDER_RING_BASE),
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.offset_udw = RING_TIMESTAMP_UDW(RENDER_RING_BASE),
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.min_graphics_ver = 4,
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.max_graphics_ver = 12,
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.size = 8
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}
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};
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int i915_reg_read_ioctl(struct drm_device *dev,
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void *data, struct drm_file *unused)
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{
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struct drm_i915_private *i915 = to_i915(dev);
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struct intel_uncore *uncore = &i915->uncore;
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struct drm_i915_reg_read *reg = data;
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struct reg_whitelist const *entry;
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intel_wakeref_t wakeref;
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unsigned int flags;
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int remain;
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int ret = 0;
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entry = reg_read_whitelist;
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remain = ARRAY_SIZE(reg_read_whitelist);
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while (remain) {
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u32 entry_offset = i915_mmio_reg_offset(entry->offset_ldw);
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GEM_BUG_ON(!is_power_of_2(entry->size));
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GEM_BUG_ON(entry->size > 8);
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GEM_BUG_ON(entry_offset & (entry->size - 1));
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if (IS_GRAPHICS_VER(i915, entry->min_graphics_ver, entry->max_graphics_ver) &&
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entry_offset == (reg->offset & -entry->size))
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break;
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entry++;
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remain--;
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}
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if (!remain)
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return -EINVAL;
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flags = reg->offset & (entry->size - 1);
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with_intel_runtime_pm(&i915->runtime_pm, wakeref) {
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if (entry->size == 8 && flags == I915_REG_READ_8B_WA)
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reg->val = intel_uncore_read64_2x32(uncore,
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entry->offset_ldw,
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entry->offset_udw);
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else if (entry->size == 8 && flags == 0)
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reg->val = intel_uncore_read64(uncore,
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entry->offset_ldw);
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else if (entry->size == 4 && flags == 0)
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reg->val = intel_uncore_read(uncore, entry->offset_ldw);
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else if (entry->size == 2 && flags == 0)
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reg->val = intel_uncore_read16(uncore,
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entry->offset_ldw);
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else if (entry->size == 1 && flags == 0)
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reg->val = intel_uncore_read8(uncore,
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entry->offset_ldw);
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else
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ret = -EINVAL;
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}
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return ret;
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}
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