2023-08-30 17:31:07 +02:00
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2015 MediaTek Inc.
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*/
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#ifndef MTK_DRM_CRTC_H
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#define MTK_DRM_CRTC_H
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#include <drm/drm_crtc.h>
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#include "mtk_drm_ddp_comp.h"
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#include "mtk_drm_plane.h"
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#define MTK_LUT_SIZE 512
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#define MTK_MAX_BPC 10
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#define MTK_MIN_BPC 3
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void mtk_drm_crtc_commit(struct drm_crtc *crtc);
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int mtk_drm_crtc_create(struct drm_device *drm_dev,
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2023-10-24 12:59:35 +02:00
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const unsigned int *path,
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unsigned int path_len,
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int priv_data_index);
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2023-08-30 17:31:07 +02:00
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int mtk_drm_crtc_plane_check(struct drm_crtc *crtc, struct drm_plane *plane,
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struct mtk_plane_state *state);
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void mtk_drm_crtc_async_update(struct drm_crtc *crtc, struct drm_plane *plane,
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struct drm_atomic_state *plane_state);
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2023-10-24 12:59:35 +02:00
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struct device *mtk_drm_crtc_dma_dev_get(struct drm_crtc *crtc);
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2023-08-30 17:31:07 +02:00
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#endif /* MTK_DRM_CRTC_H */
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