2023-08-30 17:31:07 +02:00
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#ifndef _VC4_HDMI_H_
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#define _VC4_HDMI_H_
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#include <drm/drm_connector.h>
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#include <media/cec.h>
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#include <sound/dmaengine_pcm.h>
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#include <sound/soc.h>
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#include "vc4_drv.h"
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struct vc4_hdmi;
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struct vc4_hdmi_register;
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struct vc4_hdmi_connector_state;
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enum vc4_hdmi_phy_channel {
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PHY_LANE_0 = 0,
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PHY_LANE_1,
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PHY_LANE_2,
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PHY_LANE_CK,
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};
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struct vc4_hdmi_variant {
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/* Encoder Type for that controller */
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enum vc4_encoder_type encoder_type;
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/* ALSA card name */
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const char *card_name;
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/* Filename to expose the registers in debugfs */
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const char *debugfs_name;
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/* Maximum pixel clock supported by the controller (in Hz) */
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unsigned long long max_pixel_clock;
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/* List of the registers available on that variant */
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const struct vc4_hdmi_register *registers;
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/* Number of registers on that variant */
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unsigned int num_registers;
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/* BCM2711 Only.
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* The variants don't map the lane in the same order in the
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* PHY, so this is an array mapping the HDMI channel (index)
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* to the PHY lane (value).
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*/
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enum vc4_hdmi_phy_channel phy_lane_mapping[4];
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/* The BCM2711 cannot deal with odd horizontal pixel timings */
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bool unsupported_odd_h_timings;
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/*
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* The BCM2711 CEC/hotplug IRQ controller is shared between the
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* two HDMI controllers, and we have a proper irqchip driver for
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* it.
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*/
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bool external_irq_controller;
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/* Callback to get the resources (memory region, interrupts,
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* clocks, etc) for that variant.
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*/
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int (*init_resources)(struct drm_device *drm,
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struct vc4_hdmi *vc4_hdmi);
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/* Callback to reset the HDMI block */
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void (*reset)(struct vc4_hdmi *vc4_hdmi);
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/* Callback to enable / disable the CSC */
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void (*csc_setup)(struct vc4_hdmi *vc4_hdmi,
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struct drm_connector_state *state,
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const struct drm_display_mode *mode);
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/* Callback to configure the video timings in the HDMI block */
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void (*set_timings)(struct vc4_hdmi *vc4_hdmi,
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struct drm_connector_state *state,
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const struct drm_display_mode *mode);
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/* Callback to initialize the PHY according to the connector state */
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void (*phy_init)(struct vc4_hdmi *vc4_hdmi,
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struct vc4_hdmi_connector_state *vc4_conn_state);
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/* Callback to disable the PHY */
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void (*phy_disable)(struct vc4_hdmi *vc4_hdmi);
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/* Callback to enable the RNG in the PHY */
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void (*phy_rng_enable)(struct vc4_hdmi *vc4_hdmi);
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/* Callback to disable the RNG in the PHY */
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void (*phy_rng_disable)(struct vc4_hdmi *vc4_hdmi);
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/* Callback to get channel map */
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u32 (*channel_map)(struct vc4_hdmi *vc4_hdmi, u32 channel_mask);
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/* Enables HDR metadata */
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bool supports_hdr;
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/* Callback for hardware specific hotplug detect */
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bool (*hp_detect)(struct vc4_hdmi *vc4_hdmi);
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};
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/* HDMI audio information */
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struct vc4_hdmi_audio {
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struct snd_soc_card card;
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struct snd_soc_dai_link link;
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struct snd_soc_dai_link_component cpu;
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struct snd_soc_dai_link_component codec;
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struct snd_soc_dai_link_component platform;
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struct snd_dmaengine_dai_dma_data dma_data;
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struct hdmi_audio_infoframe infoframe;
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struct platform_device *codec_pdev;
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bool streaming;
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};
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enum vc4_hdmi_output_format {
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VC4_HDMI_OUTPUT_RGB,
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VC4_HDMI_OUTPUT_YUV422,
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VC4_HDMI_OUTPUT_YUV444,
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VC4_HDMI_OUTPUT_YUV420,
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};
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2023-10-24 12:59:35 +02:00
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enum vc4_hdmi_broadcast_rgb {
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VC4_HDMI_BROADCAST_RGB_AUTO,
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VC4_HDMI_BROADCAST_RGB_FULL,
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VC4_HDMI_BROADCAST_RGB_LIMITED,
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};
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2023-08-30 17:31:07 +02:00
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/* General HDMI hardware state. */
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struct vc4_hdmi {
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struct vc4_hdmi_audio audio;
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struct platform_device *pdev;
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const struct vc4_hdmi_variant *variant;
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struct vc4_encoder encoder;
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struct drm_connector connector;
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struct delayed_work scrambling_work;
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2023-10-24 12:59:35 +02:00
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struct drm_property *broadcast_rgb_property;
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2023-08-30 17:31:07 +02:00
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struct i2c_adapter *ddc;
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void __iomem *hdmicore_regs;
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void __iomem *hd_regs;
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/* VC5 Only */
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void __iomem *cec_regs;
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/* VC5 Only */
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void __iomem *csc_regs;
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/* VC5 Only */
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void __iomem *dvp_regs;
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/* VC5 Only */
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void __iomem *phy_regs;
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/* VC5 Only */
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void __iomem *ram_regs;
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/* VC5 Only */
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void __iomem *rm_regs;
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struct gpio_desc *hpd_gpio;
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/*
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* On some systems (like the RPi4), some modes are in the same
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* frequency range than the WiFi channels (1440p@60Hz for
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* example). Should we take evasive actions because that system
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* has a wifi adapter?
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*/
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bool disable_wifi_frequencies;
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struct cec_adapter *cec_adap;
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struct cec_msg cec_rx_msg;
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bool cec_tx_ok;
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bool cec_irq_was_rx;
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struct clk *cec_clock;
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struct clk *pixel_clock;
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struct clk *hsm_clock;
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struct clk *audio_clock;
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struct clk *pixel_bvb_clock;
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struct reset_control *reset;
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struct debugfs_regset32 hdmi_regset;
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struct debugfs_regset32 hd_regset;
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/* VC5 only */
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struct debugfs_regset32 cec_regset;
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struct debugfs_regset32 csc_regset;
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struct debugfs_regset32 dvp_regset;
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struct debugfs_regset32 phy_regset;
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struct debugfs_regset32 ram_regset;
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struct debugfs_regset32 rm_regset;
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/**
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* @hw_lock: Spinlock protecting device register access.
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*/
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spinlock_t hw_lock;
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/**
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* @mutex: Mutex protecting the driver access across multiple
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* frameworks (KMS, ALSA, CEC).
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*/
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struct mutex mutex;
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/**
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* @saved_adjusted_mode: Copy of @drm_crtc_state.adjusted_mode
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* for use by ALSA hooks and interrupt handlers. Protected by @mutex.
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*/
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struct drm_display_mode saved_adjusted_mode;
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/**
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* @packet_ram_enabled: Is the HDMI controller packet RAM currently
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* on? Protected by @mutex.
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*/
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bool packet_ram_enabled;
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/**
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* @scdc_enabled: Is the HDMI controller currently running with
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* the scrambler on? Protected by @mutex.
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*/
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bool scdc_enabled;
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/**
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* @output_bpc: Copy of @vc4_connector_state.output_bpc for use
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* outside of KMS hooks. Protected by @mutex.
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*/
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unsigned int output_bpc;
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/**
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* @output_format: Copy of @vc4_connector_state.output_format
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* for use outside of KMS hooks. Protected by @mutex.
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*/
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enum vc4_hdmi_output_format output_format;
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};
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2023-10-24 12:59:35 +02:00
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#define connector_to_vc4_hdmi(_connector) \
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container_of_const(_connector, struct vc4_hdmi, connector)
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2023-08-30 17:31:07 +02:00
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static inline struct vc4_hdmi *
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encoder_to_vc4_hdmi(struct drm_encoder *encoder)
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{
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struct vc4_encoder *_encoder = to_vc4_encoder(encoder);
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2023-10-24 12:59:35 +02:00
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return container_of_const(_encoder, struct vc4_hdmi, encoder);
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2023-08-30 17:31:07 +02:00
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}
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struct vc4_hdmi_connector_state {
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struct drm_connector_state base;
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unsigned long long tmds_char_rate;
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unsigned int output_bpc;
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enum vc4_hdmi_output_format output_format;
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2023-10-24 12:59:35 +02:00
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enum vc4_hdmi_broadcast_rgb broadcast_rgb;
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2023-08-30 17:31:07 +02:00
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};
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2023-10-24 12:59:35 +02:00
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#define conn_state_to_vc4_hdmi_conn_state(_state) \
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container_of_const(_state, struct vc4_hdmi_connector_state, base)
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2023-08-30 17:31:07 +02:00
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void vc4_hdmi_phy_init(struct vc4_hdmi *vc4_hdmi,
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struct vc4_hdmi_connector_state *vc4_conn_state);
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void vc4_hdmi_phy_disable(struct vc4_hdmi *vc4_hdmi);
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void vc4_hdmi_phy_rng_enable(struct vc4_hdmi *vc4_hdmi);
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void vc4_hdmi_phy_rng_disable(struct vc4_hdmi *vc4_hdmi);
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void vc5_hdmi_phy_init(struct vc4_hdmi *vc4_hdmi,
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struct vc4_hdmi_connector_state *vc4_conn_state);
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void vc5_hdmi_phy_disable(struct vc4_hdmi *vc4_hdmi);
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void vc5_hdmi_phy_rng_enable(struct vc4_hdmi *vc4_hdmi);
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void vc5_hdmi_phy_rng_disable(struct vc4_hdmi *vc4_hdmi);
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#endif /* _VC4_HDMI_H_ */
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