221 lines
5.1 KiB
C
221 lines
5.1 KiB
C
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// SPDX-License-Identifier: GPL-2.0
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/*
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*
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* x9250.c -- Renesas X9250 potentiometers IIO driver
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*
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* Copyright 2023 CS GROUP France
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*
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* Author: Herve Codina <herve.codina@bootlin.com>
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*/
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#include <linux/delay.h>
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#include <linux/gpio/consumer.h>
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#include <linux/iio/iio.h>
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#include <linux/limits.h>
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#include <linux/module.h>
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#include <linux/regulator/consumer.h>
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#include <linux/slab.h>
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#include <linux/spi/spi.h>
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struct x9250_cfg {
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const char *name;
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int kohms;
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};
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struct x9250 {
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struct spi_device *spi;
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const struct x9250_cfg *cfg;
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struct gpio_desc *wp_gpio;
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};
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#define X9250_ID 0x50
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#define X9250_CMD_RD_WCR(_p) (0x90 | (_p))
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#define X9250_CMD_WR_WCR(_p) (0xa0 | (_p))
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static int x9250_write8(struct x9250 *x9250, u8 cmd, u8 val)
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{
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u8 txbuf[3];
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txbuf[0] = X9250_ID;
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txbuf[1] = cmd;
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txbuf[2] = val;
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return spi_write_then_read(x9250->spi, txbuf, ARRAY_SIZE(txbuf), NULL, 0);
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}
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static int x9250_read8(struct x9250 *x9250, u8 cmd, u8 *val)
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{
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u8 txbuf[2];
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txbuf[0] = X9250_ID;
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txbuf[1] = cmd;
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return spi_write_then_read(x9250->spi, txbuf, ARRAY_SIZE(txbuf), val, 1);
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}
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#define X9250_CHANNEL(ch) { \
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.type = IIO_RESISTANCE, \
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.indexed = 1, \
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.output = 1, \
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.channel = (ch), \
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
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.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
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.info_mask_shared_by_type_available = BIT(IIO_CHAN_INFO_RAW), \
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}
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static const struct iio_chan_spec x9250_channels[] = {
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X9250_CHANNEL(0),
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X9250_CHANNEL(1),
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X9250_CHANNEL(2),
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X9250_CHANNEL(3),
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};
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static int x9250_read_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan,
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int *val, int *val2, long mask)
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{
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struct x9250 *x9250 = iio_priv(indio_dev);
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int ch = chan->channel;
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int ret;
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u8 v;
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switch (mask) {
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case IIO_CHAN_INFO_RAW:
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ret = x9250_read8(x9250, X9250_CMD_RD_WCR(ch), &v);
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if (ret)
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return ret;
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*val = v;
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return IIO_VAL_INT;
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case IIO_CHAN_INFO_SCALE:
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*val = 1000 * x9250->cfg->kohms;
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*val2 = U8_MAX;
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return IIO_VAL_FRACTIONAL;
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}
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return -EINVAL;
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}
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static int x9250_read_avail(struct iio_dev *indio_dev, struct iio_chan_spec const *chan,
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const int **vals, int *type, int *length, long mask)
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{
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static const int range[] = {0, 1, 255}; /* min, step, max */
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switch (mask) {
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case IIO_CHAN_INFO_RAW:
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*length = ARRAY_SIZE(range);
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*vals = range;
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*type = IIO_VAL_INT;
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return IIO_AVAIL_RANGE;
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}
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return -EINVAL;
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}
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static int x9250_write_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan,
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int val, int val2, long mask)
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{
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struct x9250 *x9250 = iio_priv(indio_dev);
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int ch = chan->channel;
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int ret;
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if (mask != IIO_CHAN_INFO_RAW)
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return -EINVAL;
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if (val > U8_MAX || val < 0)
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return -EINVAL;
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gpiod_set_value_cansleep(x9250->wp_gpio, 0);
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ret = x9250_write8(x9250, X9250_CMD_WR_WCR(ch), val);
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gpiod_set_value_cansleep(x9250->wp_gpio, 1);
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return ret;
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}
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static const struct iio_info x9250_info = {
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.read_raw = x9250_read_raw,
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.read_avail = x9250_read_avail,
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.write_raw = x9250_write_raw,
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};
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enum x9250_type {
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X9250T,
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X9250U,
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};
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static const struct x9250_cfg x9250_cfg[] = {
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[X9250T] = { .name = "x9250t", .kohms = 100, },
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[X9250U] = { .name = "x9250u", .kohms = 50, },
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};
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static const char *const x9250_regulator_names[] = {
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"vcc",
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"avp",
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"avn",
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};
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static int x9250_probe(struct spi_device *spi)
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{
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struct iio_dev *indio_dev;
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struct x9250 *x9250;
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int ret;
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ret = devm_regulator_bulk_get_enable(&spi->dev, ARRAY_SIZE(x9250_regulator_names),
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x9250_regulator_names);
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if (ret)
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return dev_err_probe(&spi->dev, ret, "Failed to get regulators\n");
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/*
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* The x9250 needs a 5ms maximum delay after the power-supplies are set
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* before performing the first write (1ms for the first read).
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*/
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usleep_range(5000, 6000);
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indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*x9250));
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if (!indio_dev)
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return -ENOMEM;
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x9250 = iio_priv(indio_dev);
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x9250->spi = spi;
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x9250->cfg = spi_get_device_match_data(spi);
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x9250->wp_gpio = devm_gpiod_get_optional(&spi->dev, "wp", GPIOD_OUT_LOW);
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if (IS_ERR(x9250->wp_gpio))
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return dev_err_probe(&spi->dev, PTR_ERR(x9250->wp_gpio),
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"failed to get wp gpio\n");
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indio_dev->info = &x9250_info;
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indio_dev->channels = x9250_channels;
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indio_dev->num_channels = ARRAY_SIZE(x9250_channels);
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indio_dev->name = x9250->cfg->name;
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return devm_iio_device_register(&spi->dev, indio_dev);
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}
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static const struct of_device_id x9250_of_match[] = {
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{ .compatible = "renesas,x9250t", .data = &x9250_cfg[X9250T]},
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{ .compatible = "renesas,x9250u", .data = &x9250_cfg[X9250U]},
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{ }
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};
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MODULE_DEVICE_TABLE(of, x9250_of_match);
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static const struct spi_device_id x9250_id_table[] = {
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{ "x9250t", (kernel_ulong_t)&x9250_cfg[X9250T] },
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{ "x9250u", (kernel_ulong_t)&x9250_cfg[X9250U] },
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{ }
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};
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MODULE_DEVICE_TABLE(spi, x9250_id_table);
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static struct spi_driver x9250_spi_driver = {
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.driver = {
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.name = "x9250",
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.of_match_table = x9250_of_match,
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},
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.id_table = x9250_id_table,
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.probe = x9250_probe,
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};
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module_spi_driver(x9250_spi_driver);
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MODULE_AUTHOR("Herve Codina <herve.codina@bootlin.com>");
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MODULE_DESCRIPTION("X9250 ALSA SoC driver");
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MODULE_LICENSE("GPL");
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