2023-08-30 17:31:07 +02:00
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// SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0
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/* Copyright (c) 2018 Mellanox Technologies. All rights reserved */
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#include <linux/netdevice.h>
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#include <linux/netlink.h>
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#include <linux/random.h>
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#include <net/vxlan.h>
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#include "reg.h"
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#include "spectrum.h"
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#include "spectrum_nve.h"
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#define MLXSW_SP_NVE_VXLAN_IPV4_SUPPORTED_FLAGS (VXLAN_F_UDP_ZERO_CSUM_TX | \
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2023-10-24 12:59:35 +02:00
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VXLAN_F_LEARN | \
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VXLAN_F_LOCALBYPASS)
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2023-08-30 17:31:07 +02:00
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#define MLXSW_SP_NVE_VXLAN_IPV6_SUPPORTED_FLAGS (VXLAN_F_IPV6 | \
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VXLAN_F_UDP_ZERO_CSUM6_TX | \
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2023-10-24 12:59:35 +02:00
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VXLAN_F_UDP_ZERO_CSUM6_RX | \
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VXLAN_F_LOCALBYPASS)
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2023-08-30 17:31:07 +02:00
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static bool mlxsw_sp_nve_vxlan_ipv4_flags_check(const struct vxlan_config *cfg,
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struct netlink_ext_ack *extack)
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{
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if (!(cfg->flags & VXLAN_F_UDP_ZERO_CSUM_TX)) {
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NL_SET_ERR_MSG_MOD(extack, "VxLAN: Zero UDP checksum must be allowed for TX");
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return false;
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}
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if (cfg->flags & ~MLXSW_SP_NVE_VXLAN_IPV4_SUPPORTED_FLAGS) {
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NL_SET_ERR_MSG_MOD(extack, "VxLAN: Unsupported flag");
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return false;
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}
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return true;
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}
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static bool mlxsw_sp_nve_vxlan_ipv6_flags_check(const struct vxlan_config *cfg,
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struct netlink_ext_ack *extack)
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{
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if (!(cfg->flags & VXLAN_F_UDP_ZERO_CSUM6_TX)) {
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NL_SET_ERR_MSG_MOD(extack, "VxLAN: Zero UDP checksum must be allowed for TX");
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return false;
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}
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if (!(cfg->flags & VXLAN_F_UDP_ZERO_CSUM6_RX)) {
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NL_SET_ERR_MSG_MOD(extack, "VxLAN: Zero UDP checksum must be allowed for RX");
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return false;
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}
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if (cfg->flags & ~MLXSW_SP_NVE_VXLAN_IPV6_SUPPORTED_FLAGS) {
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NL_SET_ERR_MSG_MOD(extack, "VxLAN: Unsupported flag");
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return false;
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}
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return true;
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}
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static bool mlxsw_sp_nve_vxlan_can_offload(const struct mlxsw_sp_nve *nve,
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const struct mlxsw_sp_nve_params *params,
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struct netlink_ext_ack *extack)
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{
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struct vxlan_dev *vxlan = netdev_priv(params->dev);
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struct vxlan_config *cfg = &vxlan->cfg;
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if (vxlan_addr_multicast(&cfg->remote_ip)) {
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NL_SET_ERR_MSG_MOD(extack, "VxLAN: Multicast destination IP is not supported");
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return false;
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}
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if (vxlan_addr_any(&cfg->saddr)) {
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NL_SET_ERR_MSG_MOD(extack, "VxLAN: Source address must be specified");
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return false;
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}
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if (cfg->remote_ifindex) {
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NL_SET_ERR_MSG_MOD(extack, "VxLAN: Local interface is not supported");
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return false;
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}
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if (cfg->port_min || cfg->port_max) {
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NL_SET_ERR_MSG_MOD(extack, "VxLAN: Only default UDP source port range is supported");
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return false;
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}
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if (cfg->tos != 1) {
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NL_SET_ERR_MSG_MOD(extack, "VxLAN: TOS must be configured to inherit");
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return false;
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}
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if (cfg->flags & VXLAN_F_TTL_INHERIT) {
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NL_SET_ERR_MSG_MOD(extack, "VxLAN: TTL must not be configured to inherit");
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return false;
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}
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switch (cfg->saddr.sa.sa_family) {
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case AF_INET:
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if (!mlxsw_sp_nve_vxlan_ipv4_flags_check(cfg, extack))
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return false;
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break;
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case AF_INET6:
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if (!mlxsw_sp_nve_vxlan_ipv6_flags_check(cfg, extack))
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return false;
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break;
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}
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if (cfg->ttl == 0) {
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NL_SET_ERR_MSG_MOD(extack, "VxLAN: TTL must not be configured to 0");
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return false;
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}
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if (cfg->label != 0) {
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NL_SET_ERR_MSG_MOD(extack, "VxLAN: Flow label must be configured to 0");
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return false;
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}
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return true;
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}
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static bool mlxsw_sp1_nve_vxlan_can_offload(const struct mlxsw_sp_nve *nve,
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const struct mlxsw_sp_nve_params *params,
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struct netlink_ext_ack *extack)
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{
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if (params->ethertype == ETH_P_8021AD) {
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NL_SET_ERR_MSG_MOD(extack, "VxLAN: 802.1ad bridge is not supported with VxLAN");
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return false;
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}
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return mlxsw_sp_nve_vxlan_can_offload(nve, params, extack);
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}
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static void
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mlxsw_sp_nve_vxlan_ul_proto_sip_config(const struct vxlan_config *cfg,
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struct mlxsw_sp_nve_config *config)
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{
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switch (cfg->saddr.sa.sa_family) {
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case AF_INET:
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config->ul_proto = MLXSW_SP_L3_PROTO_IPV4;
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config->ul_sip.addr4 = cfg->saddr.sin.sin_addr.s_addr;
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break;
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case AF_INET6:
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config->ul_proto = MLXSW_SP_L3_PROTO_IPV6;
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config->ul_sip.addr6 = cfg->saddr.sin6.sin6_addr;
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break;
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}
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}
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static void mlxsw_sp_nve_vxlan_config(const struct mlxsw_sp_nve *nve,
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const struct mlxsw_sp_nve_params *params,
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struct mlxsw_sp_nve_config *config)
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{
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struct vxlan_dev *vxlan = netdev_priv(params->dev);
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struct vxlan_config *cfg = &vxlan->cfg;
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config->type = MLXSW_SP_NVE_TYPE_VXLAN;
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config->ttl = cfg->ttl;
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config->flowlabel = cfg->label;
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config->learning_en = cfg->flags & VXLAN_F_LEARN ? 1 : 0;
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config->ul_tb_id = RT_TABLE_MAIN;
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mlxsw_sp_nve_vxlan_ul_proto_sip_config(cfg, config);
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config->udp_dport = cfg->dst_port;
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}
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static void
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mlxsw_sp_nve_vxlan_config_prepare(char *tngcr_pl,
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const struct mlxsw_sp_nve_config *config)
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{
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struct in6_addr addr6;
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u8 udp_sport;
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mlxsw_reg_tngcr_pack(tngcr_pl, MLXSW_REG_TNGCR_TYPE_VXLAN, true,
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config->ttl);
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/* VxLAN driver's default UDP source port range is 32768 (0x8000)
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* to 60999 (0xee47). Set the upper 8 bits of the UDP source port
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* to a random number between 0x80 and 0xee
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*/
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get_random_bytes(&udp_sport, sizeof(udp_sport));
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udp_sport = (udp_sport % (0xee - 0x80 + 1)) + 0x80;
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mlxsw_reg_tngcr_nve_udp_sport_prefix_set(tngcr_pl, udp_sport);
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switch (config->ul_proto) {
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case MLXSW_SP_L3_PROTO_IPV4:
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mlxsw_reg_tngcr_usipv4_set(tngcr_pl,
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be32_to_cpu(config->ul_sip.addr4));
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break;
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case MLXSW_SP_L3_PROTO_IPV6:
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addr6 = config->ul_sip.addr6;
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mlxsw_reg_tngcr_usipv6_memcpy_to(tngcr_pl,
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(const char *)&addr6);
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break;
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}
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}
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static int
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mlxsw_sp1_nve_vxlan_config_set(struct mlxsw_sp *mlxsw_sp,
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const struct mlxsw_sp_nve_config *config)
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{
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char tngcr_pl[MLXSW_REG_TNGCR_LEN];
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u16 ul_vr_id;
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int err;
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err = mlxsw_sp_router_tb_id_vr_id(mlxsw_sp, config->ul_tb_id,
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&ul_vr_id);
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if (err)
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return err;
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mlxsw_sp_nve_vxlan_config_prepare(tngcr_pl, config);
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mlxsw_reg_tngcr_learn_enable_set(tngcr_pl, config->learning_en);
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mlxsw_reg_tngcr_underlay_virtual_router_set(tngcr_pl, ul_vr_id);
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return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(tngcr), tngcr_pl);
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}
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static void mlxsw_sp1_nve_vxlan_config_clear(struct mlxsw_sp *mlxsw_sp)
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{
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char tngcr_pl[MLXSW_REG_TNGCR_LEN];
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mlxsw_reg_tngcr_pack(tngcr_pl, MLXSW_REG_TNGCR_TYPE_VXLAN, false, 0);
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mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(tngcr), tngcr_pl);
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}
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static int mlxsw_sp1_nve_vxlan_rtdp_set(struct mlxsw_sp *mlxsw_sp,
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unsigned int tunnel_index)
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{
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char rtdp_pl[MLXSW_REG_RTDP_LEN];
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mlxsw_reg_rtdp_pack(rtdp_pl, MLXSW_REG_RTDP_TYPE_NVE, tunnel_index);
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return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(rtdp), rtdp_pl);
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}
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static int mlxsw_sp1_nve_vxlan_init(struct mlxsw_sp_nve *nve,
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const struct mlxsw_sp_nve_config *config)
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{
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struct mlxsw_sp *mlxsw_sp = nve->mlxsw_sp;
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int err;
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err = mlxsw_sp_parsing_vxlan_udp_dport_set(mlxsw_sp, config->udp_dport);
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if (err)
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return err;
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err = mlxsw_sp_parsing_depth_inc(mlxsw_sp);
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if (err)
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goto err_parsing_depth_inc;
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err = mlxsw_sp1_nve_vxlan_config_set(mlxsw_sp, config);
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if (err)
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goto err_config_set;
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err = mlxsw_sp1_nve_vxlan_rtdp_set(mlxsw_sp, nve->tunnel_index);
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if (err)
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goto err_rtdp_set;
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err = mlxsw_sp_router_nve_promote_decap(mlxsw_sp, config->ul_tb_id,
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config->ul_proto,
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&config->ul_sip,
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nve->tunnel_index);
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if (err)
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goto err_promote_decap;
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return 0;
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err_promote_decap:
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err_rtdp_set:
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mlxsw_sp1_nve_vxlan_config_clear(mlxsw_sp);
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err_config_set:
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mlxsw_sp_parsing_depth_dec(mlxsw_sp);
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err_parsing_depth_inc:
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mlxsw_sp_parsing_vxlan_udp_dport_set(mlxsw_sp, 0);
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return err;
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}
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static void mlxsw_sp1_nve_vxlan_fini(struct mlxsw_sp_nve *nve)
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{
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struct mlxsw_sp_nve_config *config = &nve->config;
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struct mlxsw_sp *mlxsw_sp = nve->mlxsw_sp;
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mlxsw_sp_router_nve_demote_decap(mlxsw_sp, config->ul_tb_id,
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config->ul_proto, &config->ul_sip);
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mlxsw_sp1_nve_vxlan_config_clear(mlxsw_sp);
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mlxsw_sp_parsing_depth_dec(mlxsw_sp);
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mlxsw_sp_parsing_vxlan_udp_dport_set(mlxsw_sp, 0);
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}
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static int
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mlxsw_sp_nve_vxlan_fdb_replay(const struct net_device *nve_dev, __be32 vni,
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struct netlink_ext_ack *extack)
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{
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if (WARN_ON(!netif_is_vxlan(nve_dev)))
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return -EINVAL;
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return vxlan_fdb_replay(nve_dev, vni, &mlxsw_sp_switchdev_notifier,
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extack);
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}
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static void
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mlxsw_sp_nve_vxlan_clear_offload(const struct net_device *nve_dev, __be32 vni)
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{
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if (WARN_ON(!netif_is_vxlan(nve_dev)))
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return;
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vxlan_fdb_clear_offload(nve_dev, vni);
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}
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const struct mlxsw_sp_nve_ops mlxsw_sp1_nve_vxlan_ops = {
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.type = MLXSW_SP_NVE_TYPE_VXLAN,
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.can_offload = mlxsw_sp1_nve_vxlan_can_offload,
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.nve_config = mlxsw_sp_nve_vxlan_config,
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.init = mlxsw_sp1_nve_vxlan_init,
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.fini = mlxsw_sp1_nve_vxlan_fini,
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.fdb_replay = mlxsw_sp_nve_vxlan_fdb_replay,
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.fdb_clear_offload = mlxsw_sp_nve_vxlan_clear_offload,
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};
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static bool mlxsw_sp2_nve_vxlan_learning_set(struct mlxsw_sp *mlxsw_sp,
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bool learning_en)
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{
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char tnpc_pl[MLXSW_REG_TNPC_LEN];
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mlxsw_reg_tnpc_pack(tnpc_pl, MLXSW_REG_TUNNEL_PORT_NVE,
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learning_en);
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return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(tnpc), tnpc_pl);
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}
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static int
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mlxsw_sp2_nve_decap_ethertype_set(struct mlxsw_sp *mlxsw_sp)
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{
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|
|
|
char spvid_pl[MLXSW_REG_SPVID_LEN] = {};
|
|
|
|
|
|
|
|
mlxsw_reg_spvid_tport_set(spvid_pl, true);
|
|
|
|
mlxsw_reg_spvid_local_port_set(spvid_pl,
|
|
|
|
MLXSW_REG_TUNNEL_PORT_NVE);
|
|
|
|
mlxsw_reg_spvid_egr_et_set_set(spvid_pl, true);
|
|
|
|
return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvid), spvid_pl);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
mlxsw_sp2_nve_vxlan_config_set(struct mlxsw_sp *mlxsw_sp,
|
|
|
|
const struct mlxsw_sp_nve_config *config)
|
|
|
|
{
|
|
|
|
char tngcr_pl[MLXSW_REG_TNGCR_LEN];
|
|
|
|
char spvtr_pl[MLXSW_REG_SPVTR_LEN];
|
|
|
|
u16 ul_rif_index;
|
|
|
|
int err;
|
|
|
|
|
|
|
|
err = mlxsw_sp_router_ul_rif_get(mlxsw_sp, config->ul_tb_id,
|
|
|
|
&ul_rif_index);
|
|
|
|
if (err)
|
|
|
|
return err;
|
|
|
|
mlxsw_sp->nve->ul_rif_index = ul_rif_index;
|
|
|
|
|
|
|
|
err = mlxsw_sp2_nve_vxlan_learning_set(mlxsw_sp, config->learning_en);
|
|
|
|
if (err)
|
|
|
|
goto err_vxlan_learning_set;
|
|
|
|
|
|
|
|
mlxsw_sp_nve_vxlan_config_prepare(tngcr_pl, config);
|
|
|
|
mlxsw_reg_tngcr_underlay_rif_set(tngcr_pl, ul_rif_index);
|
|
|
|
|
|
|
|
err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(tngcr), tngcr_pl);
|
|
|
|
if (err)
|
|
|
|
goto err_tngcr_write;
|
|
|
|
|
|
|
|
mlxsw_reg_spvtr_pack(spvtr_pl, true, MLXSW_REG_TUNNEL_PORT_NVE,
|
|
|
|
MLXSW_REG_SPVTR_IPVID_MODE_ALWAYS_PUSH_VLAN);
|
|
|
|
err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvtr), spvtr_pl);
|
|
|
|
if (err)
|
|
|
|
goto err_spvtr_write;
|
|
|
|
|
|
|
|
err = mlxsw_sp2_nve_decap_ethertype_set(mlxsw_sp);
|
|
|
|
if (err)
|
|
|
|
goto err_decap_ethertype_set;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
err_decap_ethertype_set:
|
|
|
|
mlxsw_reg_spvtr_pack(spvtr_pl, true, MLXSW_REG_TUNNEL_PORT_NVE,
|
|
|
|
MLXSW_REG_SPVTR_IPVID_MODE_IEEE_COMPLIANT_PVID);
|
|
|
|
mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvtr), spvtr_pl);
|
|
|
|
err_spvtr_write:
|
|
|
|
mlxsw_reg_tngcr_pack(tngcr_pl, MLXSW_REG_TNGCR_TYPE_VXLAN, false, 0);
|
|
|
|
mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(tngcr), tngcr_pl);
|
|
|
|
err_tngcr_write:
|
|
|
|
mlxsw_sp2_nve_vxlan_learning_set(mlxsw_sp, false);
|
|
|
|
err_vxlan_learning_set:
|
|
|
|
mlxsw_sp_router_ul_rif_put(mlxsw_sp, ul_rif_index);
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void mlxsw_sp2_nve_vxlan_config_clear(struct mlxsw_sp *mlxsw_sp)
|
|
|
|
{
|
|
|
|
char spvtr_pl[MLXSW_REG_SPVTR_LEN];
|
|
|
|
char tngcr_pl[MLXSW_REG_TNGCR_LEN];
|
|
|
|
|
|
|
|
mlxsw_reg_spvtr_pack(spvtr_pl, true, MLXSW_REG_TUNNEL_PORT_NVE,
|
|
|
|
MLXSW_REG_SPVTR_IPVID_MODE_IEEE_COMPLIANT_PVID);
|
|
|
|
mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvtr), spvtr_pl);
|
|
|
|
mlxsw_reg_tngcr_pack(tngcr_pl, MLXSW_REG_TNGCR_TYPE_VXLAN, false, 0);
|
|
|
|
mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(tngcr), tngcr_pl);
|
|
|
|
mlxsw_sp2_nve_vxlan_learning_set(mlxsw_sp, false);
|
|
|
|
mlxsw_sp_router_ul_rif_put(mlxsw_sp, mlxsw_sp->nve->ul_rif_index);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int mlxsw_sp2_nve_vxlan_rtdp_set(struct mlxsw_sp *mlxsw_sp,
|
|
|
|
unsigned int tunnel_index,
|
|
|
|
u16 ul_rif_index)
|
|
|
|
{
|
|
|
|
char rtdp_pl[MLXSW_REG_RTDP_LEN];
|
|
|
|
|
|
|
|
mlxsw_reg_rtdp_pack(rtdp_pl, MLXSW_REG_RTDP_TYPE_NVE, tunnel_index);
|
|
|
|
mlxsw_reg_rtdp_egress_router_interface_set(rtdp_pl, ul_rif_index);
|
|
|
|
|
|
|
|
return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(rtdp), rtdp_pl);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int mlxsw_sp2_nve_vxlan_init(struct mlxsw_sp_nve *nve,
|
|
|
|
const struct mlxsw_sp_nve_config *config)
|
|
|
|
{
|
|
|
|
struct mlxsw_sp *mlxsw_sp = nve->mlxsw_sp;
|
|
|
|
int err;
|
|
|
|
|
|
|
|
err = mlxsw_sp_parsing_vxlan_udp_dport_set(mlxsw_sp, config->udp_dport);
|
|
|
|
if (err)
|
|
|
|
return err;
|
|
|
|
|
|
|
|
err = mlxsw_sp_parsing_depth_inc(mlxsw_sp);
|
|
|
|
if (err)
|
|
|
|
goto err_parsing_depth_inc;
|
|
|
|
|
|
|
|
err = mlxsw_sp2_nve_vxlan_config_set(mlxsw_sp, config);
|
|
|
|
if (err)
|
|
|
|
goto err_config_set;
|
|
|
|
|
|
|
|
err = mlxsw_sp2_nve_vxlan_rtdp_set(mlxsw_sp, nve->tunnel_index,
|
|
|
|
nve->ul_rif_index);
|
|
|
|
if (err)
|
|
|
|
goto err_rtdp_set;
|
|
|
|
|
|
|
|
err = mlxsw_sp_router_nve_promote_decap(mlxsw_sp, config->ul_tb_id,
|
|
|
|
config->ul_proto,
|
|
|
|
&config->ul_sip,
|
|
|
|
nve->tunnel_index);
|
|
|
|
if (err)
|
|
|
|
goto err_promote_decap;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
err_promote_decap:
|
|
|
|
err_rtdp_set:
|
|
|
|
mlxsw_sp2_nve_vxlan_config_clear(mlxsw_sp);
|
|
|
|
err_config_set:
|
|
|
|
mlxsw_sp_parsing_depth_dec(mlxsw_sp);
|
|
|
|
err_parsing_depth_inc:
|
|
|
|
mlxsw_sp_parsing_vxlan_udp_dport_set(mlxsw_sp, 0);
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void mlxsw_sp2_nve_vxlan_fini(struct mlxsw_sp_nve *nve)
|
|
|
|
{
|
|
|
|
struct mlxsw_sp_nve_config *config = &nve->config;
|
|
|
|
struct mlxsw_sp *mlxsw_sp = nve->mlxsw_sp;
|
|
|
|
|
|
|
|
mlxsw_sp_router_nve_demote_decap(mlxsw_sp, config->ul_tb_id,
|
|
|
|
config->ul_proto, &config->ul_sip);
|
|
|
|
mlxsw_sp2_nve_vxlan_config_clear(mlxsw_sp);
|
|
|
|
mlxsw_sp_parsing_depth_dec(mlxsw_sp);
|
|
|
|
mlxsw_sp_parsing_vxlan_udp_dport_set(mlxsw_sp, 0);
|
|
|
|
}
|
|
|
|
|
|
|
|
const struct mlxsw_sp_nve_ops mlxsw_sp2_nve_vxlan_ops = {
|
|
|
|
.type = MLXSW_SP_NVE_TYPE_VXLAN,
|
|
|
|
.can_offload = mlxsw_sp_nve_vxlan_can_offload,
|
|
|
|
.nve_config = mlxsw_sp_nve_vxlan_config,
|
|
|
|
.init = mlxsw_sp2_nve_vxlan_init,
|
|
|
|
.fini = mlxsw_sp2_nve_vxlan_fini,
|
|
|
|
.fdb_replay = mlxsw_sp_nve_vxlan_fdb_replay,
|
|
|
|
.fdb_clear_offload = mlxsw_sp_nve_vxlan_clear_offload,
|
|
|
|
};
|