2023-08-30 17:31:07 +02:00
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* driver for Microchip PQI-based storage controllers
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2023-10-24 12:59:35 +02:00
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* Copyright (c) 2019-2023 Microchip Technology Inc. and its subsidiaries
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2023-08-30 17:31:07 +02:00
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* Copyright (c) 2016-2018 Microsemi Corporation
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* Copyright (c) 2016 PMC-Sierra, Inc.
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*
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* Questions/Comments/Bugfixes to storagedev@microchip.com
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*
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*/
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#if !defined(_SMARTPQI_SIS_H)
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#define _SMARTPQI_SIS_H
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void sis_verify_structures(void);
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int sis_wait_for_ctrl_ready(struct pqi_ctrl_info *ctrl_info);
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int sis_wait_for_ctrl_ready_resume(struct pqi_ctrl_info *ctrl_info);
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bool sis_is_firmware_running(struct pqi_ctrl_info *ctrl_info);
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bool sis_is_kernel_up(struct pqi_ctrl_info *ctrl_info);
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int sis_get_ctrl_properties(struct pqi_ctrl_info *ctrl_info);
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int sis_get_pqi_capabilities(struct pqi_ctrl_info *ctrl_info);
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int sis_init_base_struct_addr(struct pqi_ctrl_info *ctrl_info);
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void sis_enable_msix(struct pqi_ctrl_info *ctrl_info);
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void sis_enable_intx(struct pqi_ctrl_info *ctrl_info);
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void sis_shutdown_ctrl(struct pqi_ctrl_info *ctrl_info,
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enum pqi_ctrl_shutdown_reason ctrl_shutdown_reason);
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int sis_pqi_reset_quiesce(struct pqi_ctrl_info *ctrl_info);
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int sis_reenable_sis_mode(struct pqi_ctrl_info *ctrl_info);
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void sis_write_driver_scratch(struct pqi_ctrl_info *ctrl_info, u32 value);
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u32 sis_read_driver_scratch(struct pqi_ctrl_info *ctrl_info);
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void sis_soft_reset(struct pqi_ctrl_info *ctrl_info);
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u32 sis_get_product_id(struct pqi_ctrl_info *ctrl_info);
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int sis_wait_for_fw_triage_completion(struct pqi_ctrl_info *ctrl_info);
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extern unsigned int sis_ctrl_ready_timeout_secs;
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#endif /* _SMARTPQI_SIS_H */
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