2023-08-30 17:31:07 +02:00
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* VFIO PCI interrupt handling
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*
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* Copyright (C) 2012 Red Hat, Inc. All rights reserved.
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* Author: Alex Williamson <alex.williamson@redhat.com>
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*
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* Derived from original vfio:
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* Copyright 2010 Cisco Systems, Inc. All rights reserved.
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* Author: Tom Lyon, pugs@cisco.com
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*/
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#include <linux/device.h>
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#include <linux/interrupt.h>
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#include <linux/eventfd.h>
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#include <linux/msi.h>
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#include <linux/pci.h>
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#include <linux/file.h>
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#include <linux/vfio.h>
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#include <linux/wait.h>
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#include <linux/slab.h>
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#include "vfio_pci_priv.h"
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struct vfio_pci_irq_ctx {
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struct eventfd_ctx *trigger;
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struct virqfd *unmask;
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struct virqfd *mask;
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char *name;
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bool masked;
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struct irq_bypass_producer producer;
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};
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static bool irq_is(struct vfio_pci_core_device *vdev, int type)
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{
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return vdev->irq_type == type;
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}
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static bool is_intx(struct vfio_pci_core_device *vdev)
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{
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return vdev->irq_type == VFIO_PCI_INTX_IRQ_INDEX;
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}
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static bool is_irq_none(struct vfio_pci_core_device *vdev)
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{
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return !(vdev->irq_type == VFIO_PCI_INTX_IRQ_INDEX ||
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vdev->irq_type == VFIO_PCI_MSI_IRQ_INDEX ||
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vdev->irq_type == VFIO_PCI_MSIX_IRQ_INDEX);
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}
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2023-10-24 12:59:35 +02:00
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static
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struct vfio_pci_irq_ctx *vfio_irq_ctx_get(struct vfio_pci_core_device *vdev,
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unsigned long index)
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{
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return xa_load(&vdev->ctx, index);
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}
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static void vfio_irq_ctx_free(struct vfio_pci_core_device *vdev,
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struct vfio_pci_irq_ctx *ctx, unsigned long index)
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{
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xa_erase(&vdev->ctx, index);
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kfree(ctx);
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}
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static struct vfio_pci_irq_ctx *
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vfio_irq_ctx_alloc(struct vfio_pci_core_device *vdev, unsigned long index)
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{
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struct vfio_pci_irq_ctx *ctx;
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int ret;
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ctx = kzalloc(sizeof(*ctx), GFP_KERNEL_ACCOUNT);
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if (!ctx)
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return NULL;
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ret = xa_insert(&vdev->ctx, index, ctx, GFP_KERNEL_ACCOUNT);
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if (ret) {
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kfree(ctx);
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return NULL;
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}
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return ctx;
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}
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2023-08-30 17:31:07 +02:00
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/*
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* INTx
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*/
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static void vfio_send_intx_eventfd(void *opaque, void *unused)
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{
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struct vfio_pci_core_device *vdev = opaque;
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2023-10-24 12:59:35 +02:00
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if (likely(is_intx(vdev) && !vdev->virq_disabled)) {
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struct vfio_pci_irq_ctx *ctx;
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ctx = vfio_irq_ctx_get(vdev, 0);
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if (WARN_ON_ONCE(!ctx))
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return;
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eventfd_signal(ctx->trigger, 1);
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}
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2023-08-30 17:31:07 +02:00
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}
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/* Returns true if the INTx vfio_pci_irq_ctx.masked value is changed. */
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bool vfio_pci_intx_mask(struct vfio_pci_core_device *vdev)
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{
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struct pci_dev *pdev = vdev->pdev;
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2023-10-24 12:59:35 +02:00
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struct vfio_pci_irq_ctx *ctx;
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2023-08-30 17:31:07 +02:00
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unsigned long flags;
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bool masked_changed = false;
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spin_lock_irqsave(&vdev->irqlock, flags);
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/*
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* Masking can come from interrupt, ioctl, or config space
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* via INTx disable. The latter means this can get called
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* even when not using intx delivery. In this case, just
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* try to have the physical bit follow the virtual bit.
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*/
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if (unlikely(!is_intx(vdev))) {
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if (vdev->pci_2_3)
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pci_intx(pdev, 0);
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2023-10-24 12:59:35 +02:00
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goto out_unlock;
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}
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ctx = vfio_irq_ctx_get(vdev, 0);
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if (WARN_ON_ONCE(!ctx))
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goto out_unlock;
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if (!ctx->masked) {
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2023-08-30 17:31:07 +02:00
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/*
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* Can't use check_and_mask here because we always want to
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* mask, not just when something is pending.
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*/
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if (vdev->pci_2_3)
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pci_intx(pdev, 0);
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else
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disable_irq_nosync(pdev->irq);
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2023-10-24 12:59:35 +02:00
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ctx->masked = true;
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2023-08-30 17:31:07 +02:00
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masked_changed = true;
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}
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2023-10-24 12:59:35 +02:00
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out_unlock:
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2023-08-30 17:31:07 +02:00
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spin_unlock_irqrestore(&vdev->irqlock, flags);
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return masked_changed;
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}
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/*
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* If this is triggered by an eventfd, we can't call eventfd_signal
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* or else we'll deadlock on the eventfd wait queue. Return >0 when
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* a signal is necessary, which can then be handled via a work queue
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* or directly depending on the caller.
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*/
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static int vfio_pci_intx_unmask_handler(void *opaque, void *unused)
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{
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struct vfio_pci_core_device *vdev = opaque;
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struct pci_dev *pdev = vdev->pdev;
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2023-10-24 12:59:35 +02:00
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struct vfio_pci_irq_ctx *ctx;
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2023-08-30 17:31:07 +02:00
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unsigned long flags;
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int ret = 0;
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spin_lock_irqsave(&vdev->irqlock, flags);
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/*
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* Unmasking comes from ioctl or config, so again, have the
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* physical bit follow the virtual even when not using INTx.
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*/
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if (unlikely(!is_intx(vdev))) {
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if (vdev->pci_2_3)
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pci_intx(pdev, 1);
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2023-10-24 12:59:35 +02:00
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goto out_unlock;
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}
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ctx = vfio_irq_ctx_get(vdev, 0);
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if (WARN_ON_ONCE(!ctx))
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goto out_unlock;
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if (ctx->masked && !vdev->virq_disabled) {
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2023-08-30 17:31:07 +02:00
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/*
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* A pending interrupt here would immediately trigger,
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* but we can avoid that overhead by just re-sending
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* the interrupt to the user.
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*/
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if (vdev->pci_2_3) {
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if (!pci_check_and_unmask_intx(pdev))
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ret = 1;
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} else
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enable_irq(pdev->irq);
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2023-10-24 12:59:35 +02:00
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ctx->masked = (ret > 0);
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2023-08-30 17:31:07 +02:00
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}
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2023-10-24 12:59:35 +02:00
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out_unlock:
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2023-08-30 17:31:07 +02:00
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spin_unlock_irqrestore(&vdev->irqlock, flags);
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return ret;
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}
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void vfio_pci_intx_unmask(struct vfio_pci_core_device *vdev)
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{
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if (vfio_pci_intx_unmask_handler(vdev, NULL) > 0)
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vfio_send_intx_eventfd(vdev, NULL);
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}
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static irqreturn_t vfio_intx_handler(int irq, void *dev_id)
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{
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struct vfio_pci_core_device *vdev = dev_id;
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2023-10-24 12:59:35 +02:00
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struct vfio_pci_irq_ctx *ctx;
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2023-08-30 17:31:07 +02:00
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unsigned long flags;
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int ret = IRQ_NONE;
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2023-10-24 12:59:35 +02:00
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ctx = vfio_irq_ctx_get(vdev, 0);
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if (WARN_ON_ONCE(!ctx))
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return ret;
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2023-08-30 17:31:07 +02:00
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spin_lock_irqsave(&vdev->irqlock, flags);
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if (!vdev->pci_2_3) {
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disable_irq_nosync(vdev->pdev->irq);
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2023-10-24 12:59:35 +02:00
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ctx->masked = true;
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2023-08-30 17:31:07 +02:00
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ret = IRQ_HANDLED;
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2023-10-24 12:59:35 +02:00
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} else if (!ctx->masked && /* may be shared */
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2023-08-30 17:31:07 +02:00
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pci_check_and_mask_intx(vdev->pdev)) {
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2023-10-24 12:59:35 +02:00
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ctx->masked = true;
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2023-08-30 17:31:07 +02:00
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ret = IRQ_HANDLED;
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}
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spin_unlock_irqrestore(&vdev->irqlock, flags);
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if (ret == IRQ_HANDLED)
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vfio_send_intx_eventfd(vdev, NULL);
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return ret;
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}
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static int vfio_intx_enable(struct vfio_pci_core_device *vdev)
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{
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2023-10-24 12:59:35 +02:00
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struct vfio_pci_irq_ctx *ctx;
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2023-08-30 17:31:07 +02:00
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if (!is_irq_none(vdev))
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return -EINVAL;
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if (!vdev->pdev->irq)
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return -ENODEV;
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2023-10-24 12:59:35 +02:00
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ctx = vfio_irq_ctx_alloc(vdev, 0);
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if (!ctx)
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2023-08-30 17:31:07 +02:00
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return -ENOMEM;
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/*
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* If the virtual interrupt is masked, restore it. Devices
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* supporting DisINTx can be masked at the hardware level
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* here, non-PCI-2.3 devices will have to wait until the
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* interrupt is enabled.
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*/
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2023-10-24 12:59:35 +02:00
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ctx->masked = vdev->virq_disabled;
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2023-08-30 17:31:07 +02:00
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if (vdev->pci_2_3)
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2023-10-24 12:59:35 +02:00
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pci_intx(vdev->pdev, !ctx->masked);
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2023-08-30 17:31:07 +02:00
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vdev->irq_type = VFIO_PCI_INTX_IRQ_INDEX;
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return 0;
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}
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static int vfio_intx_set_signal(struct vfio_pci_core_device *vdev, int fd)
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{
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struct pci_dev *pdev = vdev->pdev;
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unsigned long irqflags = IRQF_SHARED;
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2023-10-24 12:59:35 +02:00
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struct vfio_pci_irq_ctx *ctx;
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2023-08-30 17:31:07 +02:00
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struct eventfd_ctx *trigger;
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unsigned long flags;
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int ret;
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2023-10-24 12:59:35 +02:00
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ctx = vfio_irq_ctx_get(vdev, 0);
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if (WARN_ON_ONCE(!ctx))
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return -EINVAL;
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if (ctx->trigger) {
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2023-08-30 17:31:07 +02:00
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free_irq(pdev->irq, vdev);
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2023-10-24 12:59:35 +02:00
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kfree(ctx->name);
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eventfd_ctx_put(ctx->trigger);
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ctx->trigger = NULL;
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2023-08-30 17:31:07 +02:00
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}
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if (fd < 0) /* Disable only */
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return 0;
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2023-10-24 12:59:35 +02:00
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ctx->name = kasprintf(GFP_KERNEL_ACCOUNT, "vfio-intx(%s)",
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pci_name(pdev));
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if (!ctx->name)
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2023-08-30 17:31:07 +02:00
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return -ENOMEM;
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trigger = eventfd_ctx_fdget(fd);
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if (IS_ERR(trigger)) {
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2023-10-24 12:59:35 +02:00
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kfree(ctx->name);
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2023-08-30 17:31:07 +02:00
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return PTR_ERR(trigger);
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}
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2023-10-24 12:59:35 +02:00
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ctx->trigger = trigger;
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2023-08-30 17:31:07 +02:00
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if (!vdev->pci_2_3)
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irqflags = 0;
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ret = request_irq(pdev->irq, vfio_intx_handler,
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2023-10-24 12:59:35 +02:00
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irqflags, ctx->name, vdev);
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2023-08-30 17:31:07 +02:00
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if (ret) {
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2023-10-24 12:59:35 +02:00
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ctx->trigger = NULL;
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kfree(ctx->name);
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2023-08-30 17:31:07 +02:00
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eventfd_ctx_put(trigger);
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return ret;
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}
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/*
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* INTx disable will stick across the new irq setup,
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* disable_irq won't.
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*/
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spin_lock_irqsave(&vdev->irqlock, flags);
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2023-10-24 12:59:35 +02:00
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if (!vdev->pci_2_3 && ctx->masked)
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2023-08-30 17:31:07 +02:00
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disable_irq_nosync(pdev->irq);
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spin_unlock_irqrestore(&vdev->irqlock, flags);
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return 0;
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}
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static void vfio_intx_disable(struct vfio_pci_core_device *vdev)
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{
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2023-10-24 12:59:35 +02:00
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struct vfio_pci_irq_ctx *ctx;
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ctx = vfio_irq_ctx_get(vdev, 0);
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WARN_ON_ONCE(!ctx);
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if (ctx) {
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vfio_virqfd_disable(&ctx->unmask);
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vfio_virqfd_disable(&ctx->mask);
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}
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2023-08-30 17:31:07 +02:00
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vfio_intx_set_signal(vdev, -1);
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vdev->irq_type = VFIO_PCI_NUM_IRQS;
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2023-10-24 12:59:35 +02:00
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vfio_irq_ctx_free(vdev, ctx, 0);
|
2023-08-30 17:31:07 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* MSI/MSI-X
|
|
|
|
*/
|
|
|
|
static irqreturn_t vfio_msihandler(int irq, void *arg)
|
|
|
|
{
|
|
|
|
struct eventfd_ctx *trigger = arg;
|
|
|
|
|
|
|
|
eventfd_signal(trigger, 1);
|
|
|
|
return IRQ_HANDLED;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int vfio_msi_enable(struct vfio_pci_core_device *vdev, int nvec, bool msix)
|
|
|
|
{
|
|
|
|
struct pci_dev *pdev = vdev->pdev;
|
|
|
|
unsigned int flag = msix ? PCI_IRQ_MSIX : PCI_IRQ_MSI;
|
|
|
|
int ret;
|
|
|
|
u16 cmd;
|
|
|
|
|
|
|
|
if (!is_irq_none(vdev))
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
/* return the number of supported vectors if we can't get all: */
|
|
|
|
cmd = vfio_pci_memory_lock_and_enable(vdev);
|
|
|
|
ret = pci_alloc_irq_vectors(pdev, 1, nvec, flag);
|
|
|
|
if (ret < nvec) {
|
|
|
|
if (ret > 0)
|
|
|
|
pci_free_irq_vectors(pdev);
|
|
|
|
vfio_pci_memory_unlock_and_restore(vdev, cmd);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
vfio_pci_memory_unlock_and_restore(vdev, cmd);
|
|
|
|
|
|
|
|
vdev->irq_type = msix ? VFIO_PCI_MSIX_IRQ_INDEX :
|
|
|
|
VFIO_PCI_MSI_IRQ_INDEX;
|
|
|
|
|
|
|
|
if (!msix) {
|
|
|
|
/*
|
|
|
|
* Compute the virtual hardware field for max msi vectors -
|
|
|
|
* it is the log base 2 of the number of vectors.
|
|
|
|
*/
|
|
|
|
vdev->msi_qmax = fls(nvec * 2 - 1) - 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2023-10-24 12:59:35 +02:00
|
|
|
/*
|
|
|
|
* vfio_msi_alloc_irq() returns the Linux IRQ number of an MSI or MSI-X device
|
|
|
|
* interrupt vector. If a Linux IRQ number is not available then a new
|
|
|
|
* interrupt is allocated if dynamic MSI-X is supported.
|
|
|
|
*
|
|
|
|
* Where is vfio_msi_free_irq()? Allocated interrupts are maintained,
|
|
|
|
* essentially forming a cache that subsequent allocations can draw from.
|
|
|
|
* Interrupts are freed using pci_free_irq_vectors() when MSI/MSI-X is
|
|
|
|
* disabled.
|
|
|
|
*/
|
|
|
|
static int vfio_msi_alloc_irq(struct vfio_pci_core_device *vdev,
|
|
|
|
unsigned int vector, bool msix)
|
2023-08-30 17:31:07 +02:00
|
|
|
{
|
|
|
|
struct pci_dev *pdev = vdev->pdev;
|
2023-10-24 12:59:35 +02:00
|
|
|
struct msi_map map;
|
|
|
|
int irq;
|
2023-08-30 17:31:07 +02:00
|
|
|
u16 cmd;
|
|
|
|
|
2023-10-24 12:59:35 +02:00
|
|
|
irq = pci_irq_vector(pdev, vector);
|
|
|
|
if (WARN_ON_ONCE(irq == 0))
|
2023-08-30 17:31:07 +02:00
|
|
|
return -EINVAL;
|
2023-10-24 12:59:35 +02:00
|
|
|
if (irq > 0 || !msix || !vdev->has_dyn_msix)
|
|
|
|
return irq;
|
2023-08-30 17:31:07 +02:00
|
|
|
|
2023-10-24 12:59:35 +02:00
|
|
|
cmd = vfio_pci_memory_lock_and_enable(vdev);
|
|
|
|
map = pci_msix_alloc_irq_at(pdev, vector, NULL);
|
|
|
|
vfio_pci_memory_unlock_and_restore(vdev, cmd);
|
2023-08-30 17:31:07 +02:00
|
|
|
|
2023-10-24 12:59:35 +02:00
|
|
|
return map.index < 0 ? map.index : map.virq;
|
|
|
|
}
|
2023-08-30 17:31:07 +02:00
|
|
|
|
2023-10-24 12:59:35 +02:00
|
|
|
static int vfio_msi_set_vector_signal(struct vfio_pci_core_device *vdev,
|
|
|
|
unsigned int vector, int fd, bool msix)
|
|
|
|
{
|
|
|
|
struct pci_dev *pdev = vdev->pdev;
|
|
|
|
struct vfio_pci_irq_ctx *ctx;
|
|
|
|
struct eventfd_ctx *trigger;
|
|
|
|
int irq = -EINVAL, ret;
|
|
|
|
u16 cmd;
|
|
|
|
|
|
|
|
ctx = vfio_irq_ctx_get(vdev, vector);
|
|
|
|
|
|
|
|
if (ctx) {
|
|
|
|
irq_bypass_unregister_producer(&ctx->producer);
|
|
|
|
irq = pci_irq_vector(pdev, vector);
|
2023-08-30 17:31:07 +02:00
|
|
|
cmd = vfio_pci_memory_lock_and_enable(vdev);
|
2023-10-24 12:59:35 +02:00
|
|
|
free_irq(irq, ctx->trigger);
|
2023-08-30 17:31:07 +02:00
|
|
|
vfio_pci_memory_unlock_and_restore(vdev, cmd);
|
2023-10-24 12:59:35 +02:00
|
|
|
/* Interrupt stays allocated, will be freed at MSI-X disable. */
|
|
|
|
kfree(ctx->name);
|
|
|
|
eventfd_ctx_put(ctx->trigger);
|
|
|
|
vfio_irq_ctx_free(vdev, ctx, vector);
|
2023-08-30 17:31:07 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
if (fd < 0)
|
|
|
|
return 0;
|
|
|
|
|
2023-10-24 12:59:35 +02:00
|
|
|
if (irq == -EINVAL) {
|
|
|
|
/* Interrupt stays allocated, will be freed at MSI-X disable. */
|
|
|
|
irq = vfio_msi_alloc_irq(vdev, vector, msix);
|
|
|
|
if (irq < 0)
|
|
|
|
return irq;
|
|
|
|
}
|
|
|
|
|
|
|
|
ctx = vfio_irq_ctx_alloc(vdev, vector);
|
|
|
|
if (!ctx)
|
2023-08-30 17:31:07 +02:00
|
|
|
return -ENOMEM;
|
|
|
|
|
2023-10-24 12:59:35 +02:00
|
|
|
ctx->name = kasprintf(GFP_KERNEL_ACCOUNT, "vfio-msi%s[%d](%s)",
|
|
|
|
msix ? "x" : "", vector, pci_name(pdev));
|
|
|
|
if (!ctx->name) {
|
|
|
|
ret = -ENOMEM;
|
|
|
|
goto out_free_ctx;
|
|
|
|
}
|
|
|
|
|
2023-08-30 17:31:07 +02:00
|
|
|
trigger = eventfd_ctx_fdget(fd);
|
|
|
|
if (IS_ERR(trigger)) {
|
2023-10-24 12:59:35 +02:00
|
|
|
ret = PTR_ERR(trigger);
|
|
|
|
goto out_free_name;
|
2023-08-30 17:31:07 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
2023-10-24 12:59:35 +02:00
|
|
|
* If the vector was previously allocated, refresh the on-device
|
|
|
|
* message data before enabling in case it had been cleared or
|
|
|
|
* corrupted (e.g. due to backdoor resets) since writing.
|
2023-08-30 17:31:07 +02:00
|
|
|
*/
|
|
|
|
cmd = vfio_pci_memory_lock_and_enable(vdev);
|
|
|
|
if (msix) {
|
|
|
|
struct msi_msg msg;
|
|
|
|
|
|
|
|
get_cached_msi_msg(irq, &msg);
|
|
|
|
pci_write_msi_msg(irq, &msg);
|
|
|
|
}
|
|
|
|
|
2023-10-24 12:59:35 +02:00
|
|
|
ret = request_irq(irq, vfio_msihandler, 0, ctx->name, trigger);
|
2023-08-30 17:31:07 +02:00
|
|
|
vfio_pci_memory_unlock_and_restore(vdev, cmd);
|
2023-10-24 12:59:35 +02:00
|
|
|
if (ret)
|
|
|
|
goto out_put_eventfd_ctx;
|
2023-08-30 17:31:07 +02:00
|
|
|
|
2023-10-24 12:59:35 +02:00
|
|
|
ctx->producer.token = trigger;
|
|
|
|
ctx->producer.irq = irq;
|
|
|
|
ret = irq_bypass_register_producer(&ctx->producer);
|
2023-08-30 17:31:07 +02:00
|
|
|
if (unlikely(ret)) {
|
|
|
|
dev_info(&pdev->dev,
|
|
|
|
"irq bypass producer (token %p) registration fails: %d\n",
|
2023-10-24 12:59:35 +02:00
|
|
|
ctx->producer.token, ret);
|
2023-08-30 17:31:07 +02:00
|
|
|
|
2023-10-24 12:59:35 +02:00
|
|
|
ctx->producer.token = NULL;
|
2023-08-30 17:31:07 +02:00
|
|
|
}
|
2023-10-24 12:59:35 +02:00
|
|
|
ctx->trigger = trigger;
|
2023-08-30 17:31:07 +02:00
|
|
|
|
|
|
|
return 0;
|
2023-10-24 12:59:35 +02:00
|
|
|
|
|
|
|
out_put_eventfd_ctx:
|
|
|
|
eventfd_ctx_put(trigger);
|
|
|
|
out_free_name:
|
|
|
|
kfree(ctx->name);
|
|
|
|
out_free_ctx:
|
|
|
|
vfio_irq_ctx_free(vdev, ctx, vector);
|
|
|
|
return ret;
|
2023-08-30 17:31:07 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
static int vfio_msi_set_block(struct vfio_pci_core_device *vdev, unsigned start,
|
|
|
|
unsigned count, int32_t *fds, bool msix)
|
|
|
|
{
|
2023-10-24 12:59:35 +02:00
|
|
|
unsigned int i, j;
|
|
|
|
int ret = 0;
|
2023-08-30 17:31:07 +02:00
|
|
|
|
|
|
|
for (i = 0, j = start; i < count && !ret; i++, j++) {
|
|
|
|
int fd = fds ? fds[i] : -1;
|
|
|
|
ret = vfio_msi_set_vector_signal(vdev, j, fd, msix);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (ret) {
|
2023-10-24 12:59:35 +02:00
|
|
|
for (i = start; i < j; i++)
|
|
|
|
vfio_msi_set_vector_signal(vdev, i, -1, msix);
|
2023-08-30 17:31:07 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void vfio_msi_disable(struct vfio_pci_core_device *vdev, bool msix)
|
|
|
|
{
|
|
|
|
struct pci_dev *pdev = vdev->pdev;
|
2023-10-24 12:59:35 +02:00
|
|
|
struct vfio_pci_irq_ctx *ctx;
|
|
|
|
unsigned long i;
|
2023-08-30 17:31:07 +02:00
|
|
|
u16 cmd;
|
|
|
|
|
2023-10-24 12:59:35 +02:00
|
|
|
xa_for_each(&vdev->ctx, i, ctx) {
|
|
|
|
vfio_virqfd_disable(&ctx->unmask);
|
|
|
|
vfio_virqfd_disable(&ctx->mask);
|
|
|
|
vfio_msi_set_vector_signal(vdev, i, -1, msix);
|
2023-08-30 17:31:07 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
cmd = vfio_pci_memory_lock_and_enable(vdev);
|
|
|
|
pci_free_irq_vectors(pdev);
|
|
|
|
vfio_pci_memory_unlock_and_restore(vdev, cmd);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Both disable paths above use pci_intx_for_msi() to clear DisINTx
|
|
|
|
* via their shutdown paths. Restore for NoINTx devices.
|
|
|
|
*/
|
|
|
|
if (vdev->nointx)
|
|
|
|
pci_intx(pdev, 0);
|
|
|
|
|
|
|
|
vdev->irq_type = VFIO_PCI_NUM_IRQS;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* IOCTL support
|
|
|
|
*/
|
|
|
|
static int vfio_pci_set_intx_unmask(struct vfio_pci_core_device *vdev,
|
|
|
|
unsigned index, unsigned start,
|
|
|
|
unsigned count, uint32_t flags, void *data)
|
|
|
|
{
|
|
|
|
if (!is_intx(vdev) || start != 0 || count != 1)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
if (flags & VFIO_IRQ_SET_DATA_NONE) {
|
|
|
|
vfio_pci_intx_unmask(vdev);
|
|
|
|
} else if (flags & VFIO_IRQ_SET_DATA_BOOL) {
|
|
|
|
uint8_t unmask = *(uint8_t *)data;
|
|
|
|
if (unmask)
|
|
|
|
vfio_pci_intx_unmask(vdev);
|
|
|
|
} else if (flags & VFIO_IRQ_SET_DATA_EVENTFD) {
|
2023-10-24 12:59:35 +02:00
|
|
|
struct vfio_pci_irq_ctx *ctx = vfio_irq_ctx_get(vdev, 0);
|
2023-08-30 17:31:07 +02:00
|
|
|
int32_t fd = *(int32_t *)data;
|
2023-10-24 12:59:35 +02:00
|
|
|
|
|
|
|
if (WARN_ON_ONCE(!ctx))
|
|
|
|
return -EINVAL;
|
2023-08-30 17:31:07 +02:00
|
|
|
if (fd >= 0)
|
|
|
|
return vfio_virqfd_enable((void *) vdev,
|
|
|
|
vfio_pci_intx_unmask_handler,
|
|
|
|
vfio_send_intx_eventfd, NULL,
|
2023-10-24 12:59:35 +02:00
|
|
|
&ctx->unmask, fd);
|
2023-08-30 17:31:07 +02:00
|
|
|
|
2023-10-24 12:59:35 +02:00
|
|
|
vfio_virqfd_disable(&ctx->unmask);
|
2023-08-30 17:31:07 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int vfio_pci_set_intx_mask(struct vfio_pci_core_device *vdev,
|
|
|
|
unsigned index, unsigned start,
|
|
|
|
unsigned count, uint32_t flags, void *data)
|
|
|
|
{
|
|
|
|
if (!is_intx(vdev) || start != 0 || count != 1)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
if (flags & VFIO_IRQ_SET_DATA_NONE) {
|
|
|
|
vfio_pci_intx_mask(vdev);
|
|
|
|
} else if (flags & VFIO_IRQ_SET_DATA_BOOL) {
|
|
|
|
uint8_t mask = *(uint8_t *)data;
|
|
|
|
if (mask)
|
|
|
|
vfio_pci_intx_mask(vdev);
|
|
|
|
} else if (flags & VFIO_IRQ_SET_DATA_EVENTFD) {
|
|
|
|
return -ENOTTY; /* XXX implement me */
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int vfio_pci_set_intx_trigger(struct vfio_pci_core_device *vdev,
|
|
|
|
unsigned index, unsigned start,
|
|
|
|
unsigned count, uint32_t flags, void *data)
|
|
|
|
{
|
|
|
|
if (is_intx(vdev) && !count && (flags & VFIO_IRQ_SET_DATA_NONE)) {
|
|
|
|
vfio_intx_disable(vdev);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (!(is_intx(vdev) || is_irq_none(vdev)) || start != 0 || count != 1)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
if (flags & VFIO_IRQ_SET_DATA_EVENTFD) {
|
|
|
|
int32_t fd = *(int32_t *)data;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
if (is_intx(vdev))
|
|
|
|
return vfio_intx_set_signal(vdev, fd);
|
|
|
|
|
|
|
|
ret = vfio_intx_enable(vdev);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
ret = vfio_intx_set_signal(vdev, fd);
|
|
|
|
if (ret)
|
|
|
|
vfio_intx_disable(vdev);
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (!is_intx(vdev))
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
if (flags & VFIO_IRQ_SET_DATA_NONE) {
|
|
|
|
vfio_send_intx_eventfd(vdev, NULL);
|
|
|
|
} else if (flags & VFIO_IRQ_SET_DATA_BOOL) {
|
|
|
|
uint8_t trigger = *(uint8_t *)data;
|
|
|
|
if (trigger)
|
|
|
|
vfio_send_intx_eventfd(vdev, NULL);
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int vfio_pci_set_msi_trigger(struct vfio_pci_core_device *vdev,
|
|
|
|
unsigned index, unsigned start,
|
|
|
|
unsigned count, uint32_t flags, void *data)
|
|
|
|
{
|
2023-10-24 12:59:35 +02:00
|
|
|
struct vfio_pci_irq_ctx *ctx;
|
|
|
|
unsigned int i;
|
2023-08-30 17:31:07 +02:00
|
|
|
bool msix = (index == VFIO_PCI_MSIX_IRQ_INDEX) ? true : false;
|
|
|
|
|
|
|
|
if (irq_is(vdev, index) && !count && (flags & VFIO_IRQ_SET_DATA_NONE)) {
|
|
|
|
vfio_msi_disable(vdev, msix);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (!(irq_is(vdev, index) || is_irq_none(vdev)))
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
if (flags & VFIO_IRQ_SET_DATA_EVENTFD) {
|
|
|
|
int32_t *fds = data;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
if (vdev->irq_type == index)
|
|
|
|
return vfio_msi_set_block(vdev, start, count,
|
|
|
|
fds, msix);
|
|
|
|
|
|
|
|
ret = vfio_msi_enable(vdev, start + count, msix);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
ret = vfio_msi_set_block(vdev, start, count, fds, msix);
|
|
|
|
if (ret)
|
|
|
|
vfio_msi_disable(vdev, msix);
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2023-10-24 12:59:35 +02:00
|
|
|
if (!irq_is(vdev, index))
|
2023-08-30 17:31:07 +02:00
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
for (i = start; i < start + count; i++) {
|
2023-10-24 12:59:35 +02:00
|
|
|
ctx = vfio_irq_ctx_get(vdev, i);
|
|
|
|
if (!ctx)
|
2023-08-30 17:31:07 +02:00
|
|
|
continue;
|
|
|
|
if (flags & VFIO_IRQ_SET_DATA_NONE) {
|
2023-10-24 12:59:35 +02:00
|
|
|
eventfd_signal(ctx->trigger, 1);
|
2023-08-30 17:31:07 +02:00
|
|
|
} else if (flags & VFIO_IRQ_SET_DATA_BOOL) {
|
|
|
|
uint8_t *bools = data;
|
|
|
|
if (bools[i - start])
|
2023-10-24 12:59:35 +02:00
|
|
|
eventfd_signal(ctx->trigger, 1);
|
2023-08-30 17:31:07 +02:00
|
|
|
}
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int vfio_pci_set_ctx_trigger_single(struct eventfd_ctx **ctx,
|
|
|
|
unsigned int count, uint32_t flags,
|
|
|
|
void *data)
|
|
|
|
{
|
|
|
|
/* DATA_NONE/DATA_BOOL enables loopback testing */
|
|
|
|
if (flags & VFIO_IRQ_SET_DATA_NONE) {
|
|
|
|
if (*ctx) {
|
|
|
|
if (count) {
|
|
|
|
eventfd_signal(*ctx, 1);
|
|
|
|
} else {
|
|
|
|
eventfd_ctx_put(*ctx);
|
|
|
|
*ctx = NULL;
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
} else if (flags & VFIO_IRQ_SET_DATA_BOOL) {
|
|
|
|
uint8_t trigger;
|
|
|
|
|
|
|
|
if (!count)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
trigger = *(uint8_t *)data;
|
|
|
|
if (trigger && *ctx)
|
|
|
|
eventfd_signal(*ctx, 1);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
} else if (flags & VFIO_IRQ_SET_DATA_EVENTFD) {
|
|
|
|
int32_t fd;
|
|
|
|
|
|
|
|
if (!count)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
fd = *(int32_t *)data;
|
|
|
|
if (fd == -1) {
|
|
|
|
if (*ctx)
|
|
|
|
eventfd_ctx_put(*ctx);
|
|
|
|
*ctx = NULL;
|
|
|
|
} else if (fd >= 0) {
|
|
|
|
struct eventfd_ctx *efdctx;
|
|
|
|
|
|
|
|
efdctx = eventfd_ctx_fdget(fd);
|
|
|
|
if (IS_ERR(efdctx))
|
|
|
|
return PTR_ERR(efdctx);
|
|
|
|
|
|
|
|
if (*ctx)
|
|
|
|
eventfd_ctx_put(*ctx);
|
|
|
|
|
|
|
|
*ctx = efdctx;
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int vfio_pci_set_err_trigger(struct vfio_pci_core_device *vdev,
|
|
|
|
unsigned index, unsigned start,
|
|
|
|
unsigned count, uint32_t flags, void *data)
|
|
|
|
{
|
|
|
|
if (index != VFIO_PCI_ERR_IRQ_INDEX || start != 0 || count > 1)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
return vfio_pci_set_ctx_trigger_single(&vdev->err_trigger,
|
|
|
|
count, flags, data);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int vfio_pci_set_req_trigger(struct vfio_pci_core_device *vdev,
|
|
|
|
unsigned index, unsigned start,
|
|
|
|
unsigned count, uint32_t flags, void *data)
|
|
|
|
{
|
|
|
|
if (index != VFIO_PCI_REQ_IRQ_INDEX || start != 0 || count > 1)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
return vfio_pci_set_ctx_trigger_single(&vdev->req_trigger,
|
|
|
|
count, flags, data);
|
|
|
|
}
|
|
|
|
|
|
|
|
int vfio_pci_set_irqs_ioctl(struct vfio_pci_core_device *vdev, uint32_t flags,
|
|
|
|
unsigned index, unsigned start, unsigned count,
|
|
|
|
void *data)
|
|
|
|
{
|
|
|
|
int (*func)(struct vfio_pci_core_device *vdev, unsigned index,
|
|
|
|
unsigned start, unsigned count, uint32_t flags,
|
|
|
|
void *data) = NULL;
|
|
|
|
|
|
|
|
switch (index) {
|
|
|
|
case VFIO_PCI_INTX_IRQ_INDEX:
|
|
|
|
switch (flags & VFIO_IRQ_SET_ACTION_TYPE_MASK) {
|
|
|
|
case VFIO_IRQ_SET_ACTION_MASK:
|
|
|
|
func = vfio_pci_set_intx_mask;
|
|
|
|
break;
|
|
|
|
case VFIO_IRQ_SET_ACTION_UNMASK:
|
|
|
|
func = vfio_pci_set_intx_unmask;
|
|
|
|
break;
|
|
|
|
case VFIO_IRQ_SET_ACTION_TRIGGER:
|
|
|
|
func = vfio_pci_set_intx_trigger;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case VFIO_PCI_MSI_IRQ_INDEX:
|
|
|
|
case VFIO_PCI_MSIX_IRQ_INDEX:
|
|
|
|
switch (flags & VFIO_IRQ_SET_ACTION_TYPE_MASK) {
|
|
|
|
case VFIO_IRQ_SET_ACTION_MASK:
|
|
|
|
case VFIO_IRQ_SET_ACTION_UNMASK:
|
|
|
|
/* XXX Need masking support exported */
|
|
|
|
break;
|
|
|
|
case VFIO_IRQ_SET_ACTION_TRIGGER:
|
|
|
|
func = vfio_pci_set_msi_trigger;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case VFIO_PCI_ERR_IRQ_INDEX:
|
|
|
|
switch (flags & VFIO_IRQ_SET_ACTION_TYPE_MASK) {
|
|
|
|
case VFIO_IRQ_SET_ACTION_TRIGGER:
|
|
|
|
if (pci_is_pcie(vdev->pdev))
|
|
|
|
func = vfio_pci_set_err_trigger;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
case VFIO_PCI_REQ_IRQ_INDEX:
|
|
|
|
switch (flags & VFIO_IRQ_SET_ACTION_TYPE_MASK) {
|
|
|
|
case VFIO_IRQ_SET_ACTION_TRIGGER:
|
|
|
|
func = vfio_pci_set_req_trigger;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (!func)
|
|
|
|
return -ENOTTY;
|
|
|
|
|
|
|
|
return func(vdev, index, start, count, flags, data);
|
|
|
|
}
|