282 lines
8.9 KiB
C
282 lines
8.9 KiB
C
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2014 Freescale Semiconductor, Inc.
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*/
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#ifndef __DT_BINDINGS_CLOCK_IMX6SX_H
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#define __DT_BINDINGS_CLOCK_IMX6SX_H
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#define IMX6SX_CLK_DUMMY 0
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#define IMX6SX_CLK_CKIL 1
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#define IMX6SX_CLK_CKIH 2
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#define IMX6SX_CLK_OSC 3
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#define IMX6SX_CLK_PLL1_SYS 4
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#define IMX6SX_CLK_PLL2_BUS 5
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#define IMX6SX_CLK_PLL3_USB_OTG 6
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#define IMX6SX_CLK_PLL4_AUDIO 7
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#define IMX6SX_CLK_PLL5_VIDEO 8
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#define IMX6SX_CLK_PLL6_ENET 9
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#define IMX6SX_CLK_PLL7_USB_HOST 10
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#define IMX6SX_CLK_USBPHY1 11
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#define IMX6SX_CLK_USBPHY2 12
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#define IMX6SX_CLK_USBPHY1_GATE 13
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#define IMX6SX_CLK_USBPHY2_GATE 14
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#define IMX6SX_CLK_PCIE_REF 15
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#define IMX6SX_CLK_PCIE_REF_125M 16
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#define IMX6SX_CLK_ENET_REF 17
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#define IMX6SX_CLK_PLL2_PFD0 18
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#define IMX6SX_CLK_PLL2_PFD1 19
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#define IMX6SX_CLK_PLL2_PFD2 20
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#define IMX6SX_CLK_PLL2_PFD3 21
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#define IMX6SX_CLK_PLL3_PFD0 22
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#define IMX6SX_CLK_PLL3_PFD1 23
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#define IMX6SX_CLK_PLL3_PFD2 24
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#define IMX6SX_CLK_PLL3_PFD3 25
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#define IMX6SX_CLK_PLL2_198M 26
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#define IMX6SX_CLK_PLL3_120M 27
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#define IMX6SX_CLK_PLL3_80M 28
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#define IMX6SX_CLK_PLL3_60M 29
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#define IMX6SX_CLK_TWD 30
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#define IMX6SX_CLK_PLL4_POST_DIV 31
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#define IMX6SX_CLK_PLL4_AUDIO_DIV 32
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#define IMX6SX_CLK_PLL5_POST_DIV 33
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#define IMX6SX_CLK_PLL5_VIDEO_DIV 34
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#define IMX6SX_CLK_STEP 35
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#define IMX6SX_CLK_PLL1_SW 36
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#define IMX6SX_CLK_OCRAM_SEL 37
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#define IMX6SX_CLK_PERIPH_PRE 38
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#define IMX6SX_CLK_PERIPH2_PRE 39
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#define IMX6SX_CLK_PERIPH_CLK2_SEL 40
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#define IMX6SX_CLK_PERIPH2_CLK2_SEL 41
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#define IMX6SX_CLK_PCIE_AXI_SEL 42
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#define IMX6SX_CLK_GPU_AXI_SEL 43
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#define IMX6SX_CLK_GPU_CORE_SEL 44
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#define IMX6SX_CLK_EIM_SLOW_SEL 45
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#define IMX6SX_CLK_USDHC1_SEL 46
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#define IMX6SX_CLK_USDHC2_SEL 47
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#define IMX6SX_CLK_USDHC3_SEL 48
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#define IMX6SX_CLK_USDHC4_SEL 49
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#define IMX6SX_CLK_SSI1_SEL 50
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#define IMX6SX_CLK_SSI2_SEL 51
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#define IMX6SX_CLK_SSI3_SEL 52
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#define IMX6SX_CLK_QSPI1_SEL 53
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#define IMX6SX_CLK_PERCLK_SEL 54
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#define IMX6SX_CLK_VID_SEL 55
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#define IMX6SX_CLK_ESAI_SEL 56
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#define IMX6SX_CLK_LDB_DI0_DIV_SEL 57
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#define IMX6SX_CLK_LDB_DI1_DIV_SEL 58
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#define IMX6SX_CLK_CAN_SEL 59
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#define IMX6SX_CLK_UART_SEL 60
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#define IMX6SX_CLK_QSPI2_SEL 61
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#define IMX6SX_CLK_LDB_DI1_SEL 62
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#define IMX6SX_CLK_LDB_DI0_SEL 63
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#define IMX6SX_CLK_SPDIF_SEL 64
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#define IMX6SX_CLK_AUDIO_SEL 65
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#define IMX6SX_CLK_ENET_PRE_SEL 66
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#define IMX6SX_CLK_ENET_SEL 67
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#define IMX6SX_CLK_M4_PRE_SEL 68
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#define IMX6SX_CLK_M4_SEL 69
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#define IMX6SX_CLK_ECSPI_SEL 70
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#define IMX6SX_CLK_LCDIF1_PRE_SEL 71
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#define IMX6SX_CLK_LCDIF2_PRE_SEL 72
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#define IMX6SX_CLK_LCDIF1_SEL 73
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#define IMX6SX_CLK_LCDIF2_SEL 74
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#define IMX6SX_CLK_DISPLAY_SEL 75
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#define IMX6SX_CLK_CSI_SEL 76
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#define IMX6SX_CLK_CKO1_SEL 77
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#define IMX6SX_CLK_CKO2_SEL 78
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#define IMX6SX_CLK_CKO 79
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#define IMX6SX_CLK_PERIPH_CLK2 80
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#define IMX6SX_CLK_PERIPH2_CLK2 81
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#define IMX6SX_CLK_IPG 82
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#define IMX6SX_CLK_GPU_CORE_PODF 83
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#define IMX6SX_CLK_GPU_AXI_PODF 84
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#define IMX6SX_CLK_LCDIF1_PODF 85
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#define IMX6SX_CLK_QSPI1_PODF 86
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#define IMX6SX_CLK_EIM_SLOW_PODF 87
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#define IMX6SX_CLK_LCDIF2_PODF 88
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#define IMX6SX_CLK_PERCLK 89
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#define IMX6SX_CLK_VID_PODF 90
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#define IMX6SX_CLK_CAN_PODF 91
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#define IMX6SX_CLK_USDHC1_PODF 92
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#define IMX6SX_CLK_USDHC2_PODF 93
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#define IMX6SX_CLK_USDHC3_PODF 94
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#define IMX6SX_CLK_USDHC4_PODF 95
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#define IMX6SX_CLK_UART_PODF 96
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#define IMX6SX_CLK_ESAI_PRED 97
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#define IMX6SX_CLK_ESAI_PODF 98
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#define IMX6SX_CLK_SSI3_PRED 99
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#define IMX6SX_CLK_SSI3_PODF 100
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#define IMX6SX_CLK_SSI1_PRED 101
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#define IMX6SX_CLK_SSI1_PODF 102
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#define IMX6SX_CLK_QSPI2_PRED 103
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#define IMX6SX_CLK_QSPI2_PODF 104
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#define IMX6SX_CLK_SSI2_PRED 105
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#define IMX6SX_CLK_SSI2_PODF 106
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#define IMX6SX_CLK_SPDIF_PRED 107
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#define IMX6SX_CLK_SPDIF_PODF 108
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#define IMX6SX_CLK_AUDIO_PRED 109
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#define IMX6SX_CLK_AUDIO_PODF 110
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#define IMX6SX_CLK_ENET_PODF 111
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#define IMX6SX_CLK_M4_PODF 112
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#define IMX6SX_CLK_ECSPI_PODF 113
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#define IMX6SX_CLK_LCDIF1_PRED 114
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#define IMX6SX_CLK_LCDIF2_PRED 115
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#define IMX6SX_CLK_DISPLAY_PODF 116
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#define IMX6SX_CLK_CSI_PODF 117
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#define IMX6SX_CLK_LDB_DI0_DIV_3_5 118
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#define IMX6SX_CLK_LDB_DI0_DIV_7 119
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#define IMX6SX_CLK_LDB_DI1_DIV_3_5 120
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#define IMX6SX_CLK_LDB_DI1_DIV_7 121
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#define IMX6SX_CLK_CKO1_PODF 122
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#define IMX6SX_CLK_CKO2_PODF 123
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#define IMX6SX_CLK_PERIPH 124
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#define IMX6SX_CLK_PERIPH2 125
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#define IMX6SX_CLK_OCRAM 126
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#define IMX6SX_CLK_AHB 127
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#define IMX6SX_CLK_MMDC_PODF 128
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#define IMX6SX_CLK_ARM 129
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#define IMX6SX_CLK_AIPS_TZ1 130
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#define IMX6SX_CLK_AIPS_TZ2 131
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#define IMX6SX_CLK_APBH_DMA 132
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#define IMX6SX_CLK_ASRC_GATE 133
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#define IMX6SX_CLK_CAAM_MEM 134
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#define IMX6SX_CLK_CAAM_ACLK 135
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#define IMX6SX_CLK_CAAM_IPG 136
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#define IMX6SX_CLK_CAN1_IPG 137
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#define IMX6SX_CLK_CAN1_SERIAL 138
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#define IMX6SX_CLK_CAN2_IPG 139
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#define IMX6SX_CLK_CAN2_SERIAL 140
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#define IMX6SX_CLK_CPU_DEBUG 141
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#define IMX6SX_CLK_DCIC1 142
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#define IMX6SX_CLK_DCIC2 143
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#define IMX6SX_CLK_AIPS_TZ3 144
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#define IMX6SX_CLK_ECSPI1 145
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#define IMX6SX_CLK_ECSPI2 146
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#define IMX6SX_CLK_ECSPI3 147
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#define IMX6SX_CLK_ECSPI4 148
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#define IMX6SX_CLK_ECSPI5 149
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#define IMX6SX_CLK_EPIT1 150
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#define IMX6SX_CLK_EPIT2 151
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#define IMX6SX_CLK_ESAI_EXTAL 152
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#define IMX6SX_CLK_WAKEUP 153
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#define IMX6SX_CLK_GPT_BUS 154
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#define IMX6SX_CLK_GPT_SERIAL 155
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#define IMX6SX_CLK_GPU 156
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#define IMX6SX_CLK_OCRAM_S 157
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#define IMX6SX_CLK_CANFD 158
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#define IMX6SX_CLK_CSI 159
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#define IMX6SX_CLK_I2C1 160
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#define IMX6SX_CLK_I2C2 161
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#define IMX6SX_CLK_I2C3 162
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#define IMX6SX_CLK_OCOTP 163
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#define IMX6SX_CLK_IOMUXC 164
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#define IMX6SX_CLK_IPMUX1 165
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#define IMX6SX_CLK_IPMUX2 166
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#define IMX6SX_CLK_IPMUX3 167
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#define IMX6SX_CLK_TZASC1 168
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#define IMX6SX_CLK_LCDIF_APB 169
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#define IMX6SX_CLK_PXP_AXI 170
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#define IMX6SX_CLK_M4 171
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#define IMX6SX_CLK_ENET 172
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#define IMX6SX_CLK_DISPLAY_AXI 173
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#define IMX6SX_CLK_LCDIF2_PIX 174
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#define IMX6SX_CLK_LCDIF1_PIX 175
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#define IMX6SX_CLK_LDB_DI0 176
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#define IMX6SX_CLK_QSPI1 177
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#define IMX6SX_CLK_MLB 178
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#define IMX6SX_CLK_MMDC_P0_FAST 179
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#define IMX6SX_CLK_MMDC_P0_IPG 180
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#define IMX6SX_CLK_AXI 181
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#define IMX6SX_CLK_PCIE_AXI 182
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#define IMX6SX_CLK_QSPI2 183
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#define IMX6SX_CLK_PER1_BCH 184
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#define IMX6SX_CLK_PER2_MAIN 185
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#define IMX6SX_CLK_PWM1 186
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#define IMX6SX_CLK_PWM2 187
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#define IMX6SX_CLK_PWM3 188
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#define IMX6SX_CLK_PWM4 189
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#define IMX6SX_CLK_GPMI_BCH_APB 190
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#define IMX6SX_CLK_GPMI_BCH 191
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#define IMX6SX_CLK_GPMI_IO 192
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#define IMX6SX_CLK_GPMI_APB 193
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#define IMX6SX_CLK_ROM 194
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#define IMX6SX_CLK_SDMA 195
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#define IMX6SX_CLK_SPBA 196
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#define IMX6SX_CLK_SPDIF 197
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#define IMX6SX_CLK_SSI1_IPG 198
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#define IMX6SX_CLK_SSI2_IPG 199
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#define IMX6SX_CLK_SSI3_IPG 200
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#define IMX6SX_CLK_SSI1 201
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#define IMX6SX_CLK_SSI2 202
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#define IMX6SX_CLK_SSI3 203
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#define IMX6SX_CLK_UART_IPG 204
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#define IMX6SX_CLK_UART_SERIAL 205
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#define IMX6SX_CLK_SAI1 206
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#define IMX6SX_CLK_SAI2 207
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#define IMX6SX_CLK_USBOH3 208
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#define IMX6SX_CLK_USDHC1 209
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#define IMX6SX_CLK_USDHC2 210
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#define IMX6SX_CLK_USDHC3 211
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#define IMX6SX_CLK_USDHC4 212
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#define IMX6SX_CLK_EIM_SLOW 213
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#define IMX6SX_CLK_PWM8 214
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#define IMX6SX_CLK_VADC 215
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#define IMX6SX_CLK_GIS 216
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#define IMX6SX_CLK_I2C4 217
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#define IMX6SX_CLK_PWM5 218
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#define IMX6SX_CLK_PWM6 219
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#define IMX6SX_CLK_PWM7 220
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#define IMX6SX_CLK_CKO1 221
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#define IMX6SX_CLK_CKO2 222
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#define IMX6SX_CLK_IPP_DI0 223
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#define IMX6SX_CLK_IPP_DI1 224
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#define IMX6SX_CLK_ENET_AHB 225
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#define IMX6SX_CLK_OCRAM_PODF 226
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#define IMX6SX_CLK_GPT_3M 227
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#define IMX6SX_CLK_ENET_PTP 228
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#define IMX6SX_CLK_ENET_PTP_REF 229
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#define IMX6SX_CLK_ENET2_REF 230
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#define IMX6SX_CLK_ENET2_REF_125M 231
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#define IMX6SX_CLK_AUDIO 232
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#define IMX6SX_CLK_LVDS1_SEL 233
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#define IMX6SX_CLK_LVDS1_OUT 234
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#define IMX6SX_CLK_ASRC_IPG 235
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#define IMX6SX_CLK_ASRC_MEM 236
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#define IMX6SX_CLK_SAI1_IPG 237
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#define IMX6SX_CLK_SAI2_IPG 238
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#define IMX6SX_CLK_ESAI_IPG 239
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#define IMX6SX_CLK_ESAI_MEM 240
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#define IMX6SX_CLK_LVDS1_IN 241
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#define IMX6SX_CLK_ANACLK1 242
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#define IMX6SX_PLL1_BYPASS_SRC 243
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#define IMX6SX_PLL2_BYPASS_SRC 244
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#define IMX6SX_PLL3_BYPASS_SRC 245
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#define IMX6SX_PLL4_BYPASS_SRC 246
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#define IMX6SX_PLL5_BYPASS_SRC 247
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#define IMX6SX_PLL6_BYPASS_SRC 248
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#define IMX6SX_PLL7_BYPASS_SRC 249
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#define IMX6SX_CLK_PLL1 250
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#define IMX6SX_CLK_PLL2 251
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#define IMX6SX_CLK_PLL3 252
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#define IMX6SX_CLK_PLL4 253
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#define IMX6SX_CLK_PLL5 254
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#define IMX6SX_CLK_PLL6 255
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#define IMX6SX_CLK_PLL7 256
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#define IMX6SX_PLL1_BYPASS 257
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#define IMX6SX_PLL2_BYPASS 258
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#define IMX6SX_PLL3_BYPASS 259
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#define IMX6SX_PLL4_BYPASS 260
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#define IMX6SX_PLL5_BYPASS 261
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#define IMX6SX_PLL6_BYPASS 262
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#define IMX6SX_PLL7_BYPASS 263
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#define IMX6SX_CLK_SPDIF_GCLK 264
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#define IMX6SX_CLK_LVDS2_SEL 265
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#define IMX6SX_CLK_LVDS2_OUT 266
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#define IMX6SX_CLK_LVDS2_IN 267
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#define IMX6SX_CLK_ANACLK2 268
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||
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#define IMX6SX_CLK_MMDC_P1_IPG 269
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#define IMX6SX_CLK_CLK_END 270
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#endif /* __DT_BINDINGS_CLOCK_IMX6SX_H */
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