126 lines
3.8 KiB
C
126 lines
3.8 KiB
C
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/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef DT_BINDINGS_MEMORY_TEGRA124_MC_H
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#define DT_BINDINGS_MEMORY_TEGRA124_MC_H
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#define TEGRA_SWGROUP_PTC 0
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#define TEGRA_SWGROUP_DC 1
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#define TEGRA_SWGROUP_DCB 2
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#define TEGRA_SWGROUP_AFI 3
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#define TEGRA_SWGROUP_AVPC 4
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#define TEGRA_SWGROUP_HDA 5
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#define TEGRA_SWGROUP_HC 6
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#define TEGRA_SWGROUP_MSENC 7
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#define TEGRA_SWGROUP_PPCS 8
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#define TEGRA_SWGROUP_SATA 9
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#define TEGRA_SWGROUP_VDE 10
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#define TEGRA_SWGROUP_MPCORELP 11
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#define TEGRA_SWGROUP_MPCORE 12
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#define TEGRA_SWGROUP_ISP2 13
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#define TEGRA_SWGROUP_XUSB_HOST 14
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#define TEGRA_SWGROUP_XUSB_DEV 15
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#define TEGRA_SWGROUP_ISP2B 16
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#define TEGRA_SWGROUP_TSEC 17
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#define TEGRA_SWGROUP_A9AVP 18
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#define TEGRA_SWGROUP_GPU 19
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#define TEGRA_SWGROUP_SDMMC1A 20
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#define TEGRA_SWGROUP_SDMMC2A 21
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#define TEGRA_SWGROUP_SDMMC3A 22
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#define TEGRA_SWGROUP_SDMMC4A 23
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#define TEGRA_SWGROUP_VIC 24
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#define TEGRA_SWGROUP_VI 25
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#define TEGRA124_MC_RESET_AFI 0
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#define TEGRA124_MC_RESET_AVPC 1
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#define TEGRA124_MC_RESET_DC 2
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#define TEGRA124_MC_RESET_DCB 3
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#define TEGRA124_MC_RESET_HC 4
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#define TEGRA124_MC_RESET_HDA 5
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#define TEGRA124_MC_RESET_ISP2 6
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#define TEGRA124_MC_RESET_MPCORE 7
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#define TEGRA124_MC_RESET_MPCORELP 8
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#define TEGRA124_MC_RESET_MSENC 9
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#define TEGRA124_MC_RESET_PPCS 10
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#define TEGRA124_MC_RESET_SATA 11
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#define TEGRA124_MC_RESET_VDE 12
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#define TEGRA124_MC_RESET_VI 13
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#define TEGRA124_MC_RESET_VIC 14
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#define TEGRA124_MC_RESET_XUSB_HOST 15
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#define TEGRA124_MC_RESET_XUSB_DEV 16
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#define TEGRA124_MC_RESET_TSEC 17
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#define TEGRA124_MC_RESET_SDMMC1 18
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#define TEGRA124_MC_RESET_SDMMC2 19
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#define TEGRA124_MC_RESET_SDMMC3 20
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#define TEGRA124_MC_RESET_SDMMC4 21
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#define TEGRA124_MC_RESET_ISP2B 22
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#define TEGRA124_MC_RESET_GPU 23
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#define TEGRA124_MC_PTCR 0
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#define TEGRA124_MC_DISPLAY0A 1
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#define TEGRA124_MC_DISPLAY0AB 2
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#define TEGRA124_MC_DISPLAY0B 3
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#define TEGRA124_MC_DISPLAY0BB 4
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#define TEGRA124_MC_DISPLAY0C 5
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#define TEGRA124_MC_DISPLAY0CB 6
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#define TEGRA124_MC_AFIR 14
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#define TEGRA124_MC_AVPCARM7R 15
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#define TEGRA124_MC_DISPLAYHC 16
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#define TEGRA124_MC_DISPLAYHCB 17
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#define TEGRA124_MC_HDAR 21
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#define TEGRA124_MC_HOST1XDMAR 22
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#define TEGRA124_MC_HOST1XR 23
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#define TEGRA124_MC_MSENCSRD 28
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#define TEGRA124_MC_PPCSAHBDMAR 29
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#define TEGRA124_MC_PPCSAHBSLVR 30
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#define TEGRA124_MC_SATAR 31
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#define TEGRA124_MC_VDEBSEVR 34
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#define TEGRA124_MC_VDEMBER 35
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#define TEGRA124_MC_VDEMCER 36
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#define TEGRA124_MC_VDETPER 37
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#define TEGRA124_MC_MPCORELPR 38
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#define TEGRA124_MC_MPCORER 39
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#define TEGRA124_MC_MSENCSWR 43
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#define TEGRA124_MC_AFIW 49
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#define TEGRA124_MC_AVPCARM7W 50
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#define TEGRA124_MC_HDAW 53
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#define TEGRA124_MC_HOST1XW 54
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#define TEGRA124_MC_MPCORELPW 56
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#define TEGRA124_MC_MPCOREW 57
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#define TEGRA124_MC_PPCSAHBDMAW 59
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#define TEGRA124_MC_PPCSAHBSLVW 60
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#define TEGRA124_MC_SATAW 61
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#define TEGRA124_MC_VDEBSEVW 62
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#define TEGRA124_MC_VDEDBGW 63
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#define TEGRA124_MC_VDEMBEW 64
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#define TEGRA124_MC_VDETPMW 65
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#define TEGRA124_MC_ISPRA 68
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#define TEGRA124_MC_ISPWA 70
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#define TEGRA124_MC_ISPWB 71
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#define TEGRA124_MC_XUSB_HOSTR 74
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#define TEGRA124_MC_XUSB_HOSTW 75
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#define TEGRA124_MC_XUSB_DEVR 76
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#define TEGRA124_MC_XUSB_DEVW 77
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#define TEGRA124_MC_ISPRAB 78
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#define TEGRA124_MC_ISPWAB 80
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#define TEGRA124_MC_ISPWBB 81
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#define TEGRA124_MC_TSECSRD 84
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#define TEGRA124_MC_TSECSWR 85
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#define TEGRA124_MC_A9AVPSCR 86
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#define TEGRA124_MC_A9AVPSCW 87
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#define TEGRA124_MC_GPUSRD 88
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#define TEGRA124_MC_GPUSWR 89
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#define TEGRA124_MC_DISPLAYT 90
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#define TEGRA124_MC_SDMMCRA 96
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#define TEGRA124_MC_SDMMCRAA 97
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#define TEGRA124_MC_SDMMCR 98
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#define TEGRA124_MC_SDMMCRAB 99
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#define TEGRA124_MC_SDMMCWA 100
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#define TEGRA124_MC_SDMMCWAA 101
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#define TEGRA124_MC_SDMMCW 102
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#define TEGRA124_MC_SDMMCWAB 103
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#define TEGRA124_MC_VICSRD 108
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#define TEGRA124_MC_VICSWR 109
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#define TEGRA124_MC_VIW 114
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#define TEGRA124_MC_DISPLAYD 115
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#endif
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