2023-08-30 17:31:07 +02:00
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// SPDX-License-Identifier: GPL-2.0+
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// Copyright 2018-2021 NXP
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#include <linux/clk.h>
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#include <linux/clk-provider.h>
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#include <linux/delay.h>
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#include <linux/dmaengine.h>
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#include <linux/module.h>
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#include <linux/of_device.h>
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#include <linux/of_address.h>
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#include <linux/pm_runtime.h>
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#include <linux/rpmsg.h>
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#include <linux/slab.h>
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#include <sound/core.h>
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#include <sound/dmaengine_pcm.h>
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#include <sound/pcm_params.h>
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#include "fsl_rpmsg.h"
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#include "imx-pcm.h"
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#define FSL_RPMSG_RATES (SNDRV_PCM_RATE_8000 | \
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SNDRV_PCM_RATE_16000 | \
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SNDRV_PCM_RATE_48000)
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#define FSL_RPMSG_FORMATS SNDRV_PCM_FMTBIT_S16_LE
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/* 192kHz/32bit/2ch/60s size is 0x574e00 */
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#define LPA_LARGE_BUFFER_SIZE (0x6000000)
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static const unsigned int fsl_rpmsg_rates[] = {
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8000, 11025, 16000, 22050, 44100,
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32000, 48000, 96000, 88200, 176400, 192000,
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352800, 384000, 705600, 768000, 1411200, 2822400,
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};
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static const struct snd_pcm_hw_constraint_list fsl_rpmsg_rate_constraints = {
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.count = ARRAY_SIZE(fsl_rpmsg_rates),
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.list = fsl_rpmsg_rates,
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};
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static int fsl_rpmsg_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params,
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struct snd_soc_dai *dai)
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{
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struct fsl_rpmsg *rpmsg = snd_soc_dai_get_drvdata(dai);
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struct clk *p = rpmsg->mclk, *pll = NULL, *npll = NULL;
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u64 rate = params_rate(params);
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int ret = 0;
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/* Get current pll parent */
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while (p && rpmsg->pll8k && rpmsg->pll11k) {
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struct clk *pp = clk_get_parent(p);
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if (clk_is_match(pp, rpmsg->pll8k) ||
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clk_is_match(pp, rpmsg->pll11k)) {
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pll = pp;
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break;
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}
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p = pp;
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}
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/* Switch to another pll parent if needed. */
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if (pll) {
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npll = (do_div(rate, 8000) ? rpmsg->pll11k : rpmsg->pll8k);
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if (!clk_is_match(pll, npll)) {
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ret = clk_set_parent(p, npll);
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if (ret < 0)
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dev_warn(dai->dev, "failed to set parent %s: %d\n",
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__clk_get_name(npll), ret);
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}
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}
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if (!(rpmsg->mclk_streams & BIT(substream->stream))) {
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ret = clk_prepare_enable(rpmsg->mclk);
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if (ret) {
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dev_err(dai->dev, "failed to enable mclk: %d\n", ret);
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return ret;
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}
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rpmsg->mclk_streams |= BIT(substream->stream);
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}
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return ret;
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}
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static int fsl_rpmsg_hw_free(struct snd_pcm_substream *substream,
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struct snd_soc_dai *dai)
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{
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struct fsl_rpmsg *rpmsg = snd_soc_dai_get_drvdata(dai);
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if (rpmsg->mclk_streams & BIT(substream->stream)) {
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clk_disable_unprepare(rpmsg->mclk);
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rpmsg->mclk_streams &= ~BIT(substream->stream);
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}
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return 0;
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}
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static int fsl_rpmsg_startup(struct snd_pcm_substream *substream,
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struct snd_soc_dai *cpu_dai)
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{
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int ret;
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ret = snd_pcm_hw_constraint_list(substream->runtime, 0,
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SNDRV_PCM_HW_PARAM_RATE,
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&fsl_rpmsg_rate_constraints);
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return ret;
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}
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static const struct snd_soc_dai_ops fsl_rpmsg_dai_ops = {
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.startup = fsl_rpmsg_startup,
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.hw_params = fsl_rpmsg_hw_params,
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.hw_free = fsl_rpmsg_hw_free,
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};
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static struct snd_soc_dai_driver fsl_rpmsg_dai = {
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.playback = {
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.stream_name = "CPU-Playback",
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.channels_min = 2,
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.channels_max = 32,
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.rates = SNDRV_PCM_RATE_KNOT,
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.formats = FSL_RPMSG_FORMATS,
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},
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.capture = {
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.stream_name = "CPU-Capture",
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.channels_min = 2,
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.channels_max = 32,
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.rates = SNDRV_PCM_RATE_KNOT,
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.formats = FSL_RPMSG_FORMATS,
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},
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.symmetric_rate = 1,
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.symmetric_channels = 1,
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.symmetric_sample_bits = 1,
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.ops = &fsl_rpmsg_dai_ops,
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};
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static const struct snd_soc_component_driver fsl_component = {
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.name = "fsl-rpmsg",
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.legacy_dai_naming = 1,
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};
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static const struct fsl_rpmsg_soc_data imx7ulp_data = {
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.rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |
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SNDRV_PCM_RATE_48000,
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.formats = SNDRV_PCM_FMTBIT_S16_LE,
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};
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static const struct fsl_rpmsg_soc_data imx8mm_data = {
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.rates = SNDRV_PCM_RATE_KNOT,
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.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE |
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SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_DSD_U8 |
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SNDRV_PCM_FMTBIT_DSD_U16_LE | SNDRV_PCM_FMTBIT_DSD_U32_LE,
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};
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static const struct fsl_rpmsg_soc_data imx8mn_data = {
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.rates = SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |
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SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 |
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SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |
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SNDRV_PCM_RATE_192000,
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.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE |
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SNDRV_PCM_FMTBIT_S32_LE,
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};
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static const struct fsl_rpmsg_soc_data imx8mp_data = {
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.rates = SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |
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SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 |
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SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |
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SNDRV_PCM_RATE_192000,
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.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE |
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SNDRV_PCM_FMTBIT_S32_LE,
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};
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static const struct of_device_id fsl_rpmsg_ids[] = {
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{ .compatible = "fsl,imx7ulp-rpmsg-audio", .data = &imx7ulp_data},
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{ .compatible = "fsl,imx8mm-rpmsg-audio", .data = &imx8mm_data},
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{ .compatible = "fsl,imx8mn-rpmsg-audio", .data = &imx8mn_data},
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{ .compatible = "fsl,imx8mp-rpmsg-audio", .data = &imx8mp_data},
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{ .compatible = "fsl,imx8ulp-rpmsg-audio", .data = &imx7ulp_data},
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{ /* sentinel */ }
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};
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MODULE_DEVICE_TABLE(of, fsl_rpmsg_ids);
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static int fsl_rpmsg_probe(struct platform_device *pdev)
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{
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struct device_node *np = pdev->dev.of_node;
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struct fsl_rpmsg *rpmsg;
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int ret;
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rpmsg = devm_kzalloc(&pdev->dev, sizeof(struct fsl_rpmsg), GFP_KERNEL);
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if (!rpmsg)
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return -ENOMEM;
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rpmsg->soc_data = of_device_get_match_data(&pdev->dev);
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fsl_rpmsg_dai.playback.rates = rpmsg->soc_data->rates;
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fsl_rpmsg_dai.capture.rates = rpmsg->soc_data->rates;
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fsl_rpmsg_dai.playback.formats = rpmsg->soc_data->formats;
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fsl_rpmsg_dai.capture.formats = rpmsg->soc_data->formats;
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if (of_property_read_bool(np, "fsl,enable-lpa")) {
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rpmsg->enable_lpa = 1;
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rpmsg->buffer_size = LPA_LARGE_BUFFER_SIZE;
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} else {
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rpmsg->buffer_size = IMX_DEFAULT_DMABUF_SIZE;
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}
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/* Get the optional clocks */
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rpmsg->ipg = devm_clk_get_optional(&pdev->dev, "ipg");
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if (IS_ERR(rpmsg->ipg))
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return PTR_ERR(rpmsg->ipg);
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rpmsg->mclk = devm_clk_get_optional(&pdev->dev, "mclk");
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if (IS_ERR(rpmsg->mclk))
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return PTR_ERR(rpmsg->mclk);
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rpmsg->dma = devm_clk_get_optional(&pdev->dev, "dma");
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if (IS_ERR(rpmsg->dma))
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return PTR_ERR(rpmsg->dma);
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rpmsg->pll8k = devm_clk_get_optional(&pdev->dev, "pll8k");
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if (IS_ERR(rpmsg->pll8k))
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return PTR_ERR(rpmsg->pll8k);
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rpmsg->pll11k = devm_clk_get_optional(&pdev->dev, "pll11k");
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if (IS_ERR(rpmsg->pll11k))
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return PTR_ERR(rpmsg->pll11k);
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platform_set_drvdata(pdev, rpmsg);
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pm_runtime_enable(&pdev->dev);
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ret = devm_snd_soc_register_component(&pdev->dev, &fsl_component,
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&fsl_rpmsg_dai, 1);
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if (ret)
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return ret;
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rpmsg->card_pdev = platform_device_register_data(&pdev->dev,
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"imx-audio-rpmsg",
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PLATFORM_DEVID_AUTO,
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NULL,
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0);
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if (IS_ERR(rpmsg->card_pdev)) {
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dev_err(&pdev->dev, "failed to register rpmsg card\n");
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ret = PTR_ERR(rpmsg->card_pdev);
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return ret;
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}
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return 0;
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}
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2023-10-24 12:59:35 +02:00
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static void fsl_rpmsg_remove(struct platform_device *pdev)
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2023-08-30 17:31:07 +02:00
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{
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struct fsl_rpmsg *rpmsg = platform_get_drvdata(pdev);
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if (rpmsg->card_pdev)
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platform_device_unregister(rpmsg->card_pdev);
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}
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#ifdef CONFIG_PM
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static int fsl_rpmsg_runtime_resume(struct device *dev)
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{
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struct fsl_rpmsg *rpmsg = dev_get_drvdata(dev);
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int ret;
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ret = clk_prepare_enable(rpmsg->ipg);
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if (ret) {
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dev_err(dev, "failed to enable ipg clock: %d\n", ret);
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goto ipg_err;
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}
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ret = clk_prepare_enable(rpmsg->dma);
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if (ret) {
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dev_err(dev, "Failed to enable dma clock %d\n", ret);
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goto dma_err;
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}
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return 0;
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dma_err:
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clk_disable_unprepare(rpmsg->ipg);
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ipg_err:
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return ret;
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}
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static int fsl_rpmsg_runtime_suspend(struct device *dev)
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{
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struct fsl_rpmsg *rpmsg = dev_get_drvdata(dev);
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clk_disable_unprepare(rpmsg->dma);
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clk_disable_unprepare(rpmsg->ipg);
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return 0;
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}
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#endif
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static const struct dev_pm_ops fsl_rpmsg_pm_ops = {
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SET_RUNTIME_PM_OPS(fsl_rpmsg_runtime_suspend,
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fsl_rpmsg_runtime_resume,
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NULL)
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};
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static struct platform_driver fsl_rpmsg_driver = {
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.probe = fsl_rpmsg_probe,
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2023-10-24 12:59:35 +02:00
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.remove_new = fsl_rpmsg_remove,
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2023-08-30 17:31:07 +02:00
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.driver = {
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.name = "fsl_rpmsg",
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.pm = &fsl_rpmsg_pm_ops,
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.of_match_table = fsl_rpmsg_ids,
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},
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};
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module_platform_driver(fsl_rpmsg_driver);
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MODULE_DESCRIPTION("Freescale SoC Audio PRMSG CPU Interface");
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MODULE_AUTHOR("Shengjiu Wang <shengjiu.wang@nxp.com>");
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MODULE_ALIAS("platform:fsl_rpmsg");
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MODULE_LICENSE("GPL");
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