270 lines
6.7 KiB
C
270 lines
6.7 KiB
C
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// SPDX-License-Identifier: GPL-2.0
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//
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// Common functions for loongson I2S controller driver
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//
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// Copyright (C) 2023 Loongson Technology Corporation Limited.
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// Author: Yingkun Meng <mengyingkun@loongson.cn>
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//
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/delay.h>
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#include <linux/pm_runtime.h>
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#include <linux/dma-mapping.h>
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#include <sound/soc.h>
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#include <linux/regmap.h>
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#include <sound/pcm_params.h>
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#include "loongson_i2s.h"
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#define LOONGSON_I2S_FORMATS (SNDRV_PCM_FMTBIT_S8 | \
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SNDRV_PCM_FMTBIT_S16_LE | \
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SNDRV_PCM_FMTBIT_S20_3LE | \
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SNDRV_PCM_FMTBIT_S24_LE)
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static int loongson_i2s_trigger(struct snd_pcm_substream *substream, int cmd,
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struct snd_soc_dai *dai)
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{
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struct loongson_i2s *i2s = snd_soc_dai_get_drvdata(dai);
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int ret = 0;
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switch (cmd) {
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case SNDRV_PCM_TRIGGER_START:
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case SNDRV_PCM_TRIGGER_RESUME:
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case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
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regmap_update_bits(i2s->regmap, LS_I2S_CTRL,
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I2S_CTRL_TX_EN | I2S_CTRL_TX_DMA_EN,
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I2S_CTRL_TX_EN | I2S_CTRL_TX_DMA_EN);
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else
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regmap_update_bits(i2s->regmap, LS_I2S_CTRL,
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I2S_CTRL_RX_EN | I2S_CTRL_RX_DMA_EN,
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I2S_CTRL_RX_EN | I2S_CTRL_RX_DMA_EN);
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break;
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case SNDRV_PCM_TRIGGER_STOP:
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case SNDRV_PCM_TRIGGER_SUSPEND:
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case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
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regmap_update_bits(i2s->regmap, LS_I2S_CTRL,
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I2S_CTRL_TX_EN | I2S_CTRL_TX_DMA_EN, 0);
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else
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regmap_update_bits(i2s->regmap, LS_I2S_CTRL,
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I2S_CTRL_RX_EN | I2S_CTRL_RX_DMA_EN, 0);
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break;
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default:
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ret = -EINVAL;
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}
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return ret;
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}
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static int loongson_i2s_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params,
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struct snd_soc_dai *dai)
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{
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struct loongson_i2s *i2s = snd_soc_dai_get_drvdata(dai);
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u32 clk_rate = i2s->clk_rate;
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u32 sysclk = i2s->sysclk;
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u32 bits = params_width(params);
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u32 chans = params_channels(params);
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u32 fs = params_rate(params);
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u32 bclk_ratio, mclk_ratio;
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u32 mclk_ratio_frac;
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u32 val = 0;
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switch (i2s->rev_id) {
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case 0:
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bclk_ratio = DIV_ROUND_CLOSEST(clk_rate,
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(bits * chans * fs * 2)) - 1;
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mclk_ratio = DIV_ROUND_CLOSEST(clk_rate, (sysclk * 2)) - 1;
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/* According to 2k1000LA user manual, set bits == depth */
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val |= (bits << 24);
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val |= (bits << 16);
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val |= (bclk_ratio << 8);
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val |= mclk_ratio;
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regmap_write(i2s->regmap, LS_I2S_CFG, val);
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break;
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case 1:
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bclk_ratio = DIV_ROUND_CLOSEST(sysclk,
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(bits * chans * fs * 2)) - 1;
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mclk_ratio = clk_rate / sysclk;
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mclk_ratio_frac = DIV_ROUND_CLOSEST_ULL(((u64)clk_rate << 16),
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sysclk) - (mclk_ratio << 16);
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regmap_read(i2s->regmap, LS_I2S_CFG, &val);
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val |= (bits << 24);
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val |= (bclk_ratio << 8);
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
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val |= (bits << 16);
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else
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val |= bits;
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regmap_write(i2s->regmap, LS_I2S_CFG, val);
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val = (mclk_ratio_frac << 16) | mclk_ratio;
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regmap_write(i2s->regmap, LS_I2S_CFG1, val);
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break;
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default:
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dev_err(i2s->dev, "I2S revision invalid\n");
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return -EINVAL;
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}
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return 0;
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}
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static int loongson_i2s_set_dai_sysclk(struct snd_soc_dai *dai, int clk_id,
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unsigned int freq, int dir)
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{
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struct loongson_i2s *i2s = snd_soc_dai_get_drvdata(dai);
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i2s->sysclk = freq;
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return 0;
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}
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static int loongson_i2s_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
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{
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struct loongson_i2s *i2s = snd_soc_dai_get_drvdata(dai);
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u32 val;
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int ret;
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switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
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case SND_SOC_DAIFMT_I2S:
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break;
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case SND_SOC_DAIFMT_RIGHT_J:
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regmap_update_bits(i2s->regmap, LS_I2S_CTRL, I2S_CTRL_MSB,
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I2S_CTRL_MSB);
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break;
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default:
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return -EINVAL;
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}
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switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {
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case SND_SOC_DAIFMT_BC_FC:
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break;
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case SND_SOC_DAIFMT_BP_FC:
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/* Enable master mode */
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regmap_update_bits(i2s->regmap, LS_I2S_CTRL, I2S_CTRL_MASTER,
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I2S_CTRL_MASTER);
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if (i2s->rev_id == 1) {
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ret = regmap_read_poll_timeout_atomic(i2s->regmap,
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LS_I2S_CTRL, val,
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val & I2S_CTRL_CLK_READY,
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10, 500000);
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if (ret < 0)
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dev_warn(dai->dev, "wait BCLK ready timeout\n");
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}
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break;
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case SND_SOC_DAIFMT_BC_FP:
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/* Enable MCLK */
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if (i2s->rev_id == 1) {
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regmap_update_bits(i2s->regmap, LS_I2S_CTRL,
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I2S_CTRL_MCLK_EN,
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I2S_CTRL_MCLK_EN);
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ret = regmap_read_poll_timeout_atomic(i2s->regmap,
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LS_I2S_CTRL, val,
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val & I2S_CTRL_MCLK_READY,
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10, 500000);
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if (ret < 0)
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dev_warn(dai->dev, "wait MCLK ready timeout\n");
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}
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break;
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case SND_SOC_DAIFMT_BP_FP:
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/* Enable MCLK */
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if (i2s->rev_id == 1) {
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regmap_update_bits(i2s->regmap, LS_I2S_CTRL,
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I2S_CTRL_MCLK_EN,
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I2S_CTRL_MCLK_EN);
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ret = regmap_read_poll_timeout_atomic(i2s->regmap,
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LS_I2S_CTRL, val,
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val & I2S_CTRL_MCLK_READY,
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10, 500000);
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if (ret < 0)
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dev_warn(dai->dev, "wait MCLK ready timeout\n");
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}
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/* Enable master mode */
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regmap_update_bits(i2s->regmap, LS_I2S_CTRL, I2S_CTRL_MASTER,
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I2S_CTRL_MASTER);
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if (i2s->rev_id == 1) {
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ret = regmap_read_poll_timeout_atomic(i2s->regmap,
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LS_I2S_CTRL, val,
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val & I2S_CTRL_CLK_READY,
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10, 500000);
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if (ret < 0)
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dev_warn(dai->dev, "wait BCLK ready timeout\n");
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}
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break;
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default:
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return -EINVAL;
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}
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return 0;
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}
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static const struct snd_soc_dai_ops loongson_i2s_dai_ops = {
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.trigger = loongson_i2s_trigger,
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.hw_params = loongson_i2s_hw_params,
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.set_sysclk = loongson_i2s_set_dai_sysclk,
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.set_fmt = loongson_i2s_set_fmt,
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};
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static int loongson_i2s_dai_probe(struct snd_soc_dai *cpu_dai)
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{
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struct loongson_i2s *i2s = dev_get_drvdata(cpu_dai->dev);
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snd_soc_dai_init_dma_data(cpu_dai, &i2s->playback_dma_data,
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&i2s->capture_dma_data);
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snd_soc_dai_set_drvdata(cpu_dai, i2s);
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return 0;
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}
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struct snd_soc_dai_driver loongson_i2s_dai = {
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.name = "loongson-i2s",
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.probe = loongson_i2s_dai_probe,
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.playback = {
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.stream_name = "CPU-Playback",
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.channels_min = 1,
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.channels_max = 2,
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.rates = SNDRV_PCM_RATE_8000_96000,
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.formats = LOONGSON_I2S_FORMATS,
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},
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.capture = {
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.stream_name = "CPU-Capture",
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.channels_min = 1,
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.channels_max = 2,
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.rates = SNDRV_PCM_RATE_8000_96000,
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.formats = LOONGSON_I2S_FORMATS,
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},
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.ops = &loongson_i2s_dai_ops,
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.symmetric_rate = 1,
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};
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static int i2s_suspend(struct device *dev)
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{
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struct loongson_i2s *i2s = dev_get_drvdata(dev);
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regcache_cache_only(i2s->regmap, true);
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return 0;
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}
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static int i2s_resume(struct device *dev)
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{
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struct loongson_i2s *i2s = dev_get_drvdata(dev);
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int ret;
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regcache_cache_only(i2s->regmap, false);
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regcache_mark_dirty(i2s->regmap);
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ret = regcache_sync(i2s->regmap);
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return ret;
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}
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const struct dev_pm_ops loongson_i2s_pm = {
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SYSTEM_SLEEP_PM_OPS(i2s_suspend, i2s_resume)
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};
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