2023-08-30 17:31:07 +02:00
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/* SPDX-License-Identifier: LGPL-2.1 OR MIT */
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/*
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* MIPS specific definitions for NOLIBC
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* Copyright (C) 2017-2022 Willy Tarreau <w@1wt.eu>
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*/
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#ifndef _NOLIBC_ARCH_MIPS_H
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#define _NOLIBC_ARCH_MIPS_H
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2023-10-24 12:59:35 +02:00
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#include "compiler.h"
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2023-08-30 17:31:07 +02:00
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/* The struct returned by the stat() syscall. 88 bytes are returned by the
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* syscall.
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*/
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struct sys_stat_struct {
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unsigned int st_dev;
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long st_pad1[3];
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unsigned long st_ino;
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unsigned int st_mode;
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unsigned int st_nlink;
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unsigned int st_uid;
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unsigned int st_gid;
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unsigned int st_rdev;
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long st_pad2[2];
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long st_size;
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long st_pad3;
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long st_atime;
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long st_atime_nsec;
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long st_mtime;
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long st_mtime_nsec;
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long st_ctime;
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long st_ctime_nsec;
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long st_blksize;
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long st_blocks;
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long st_pad4[14];
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};
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/* Syscalls for MIPS ABI O32 :
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* - WARNING! there's always a delayed slot!
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* - WARNING again, the syntax is different, registers take a '$' and numbers
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* do not.
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* - registers are 32-bit
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* - stack is 8-byte aligned
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* - syscall number is passed in v0 (starts at 0xfa0).
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* - arguments are in a0, a1, a2, a3, then the stack. The caller needs to
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* leave some room in the stack for the callee to save a0..a3 if needed.
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* - Many registers are clobbered, in fact only a0..a2 and s0..s8 are
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* preserved. See: https://www.linux-mips.org/wiki/Syscall as well as
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* scall32-o32.S in the kernel sources.
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* - the system call is performed by calling "syscall"
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* - syscall return comes in v0, and register a3 needs to be checked to know
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* if an error occurred, in which case errno is in v0.
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* - the arguments are cast to long and assigned into the target registers
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* which are then simply passed as registers to the asm code, so that we
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* don't have to experience issues with register constraints.
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*/
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#define my_syscall0(num) \
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({ \
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register long _num __asm__ ("v0") = (num); \
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register long _arg4 __asm__ ("a3"); \
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\
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__asm__ volatile ( \
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"addiu $sp, $sp, -32\n" \
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"syscall\n" \
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"addiu $sp, $sp, 32\n" \
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: "=r"(_num), "=r"(_arg4) \
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: "r"(_num) \
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: "memory", "cc", "at", "v1", "hi", "lo", \
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"t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", "t8", "t9" \
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); \
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_arg4 ? -_num : _num; \
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})
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#define my_syscall1(num, arg1) \
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({ \
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register long _num __asm__ ("v0") = (num); \
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register long _arg1 __asm__ ("a0") = (long)(arg1); \
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register long _arg4 __asm__ ("a3"); \
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\
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__asm__ volatile ( \
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"addiu $sp, $sp, -32\n" \
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"syscall\n" \
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"addiu $sp, $sp, 32\n" \
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: "=r"(_num), "=r"(_arg4) \
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: "0"(_num), \
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"r"(_arg1) \
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: "memory", "cc", "at", "v1", "hi", "lo", \
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"t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", "t8", "t9" \
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); \
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_arg4 ? -_num : _num; \
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})
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#define my_syscall2(num, arg1, arg2) \
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({ \
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register long _num __asm__ ("v0") = (num); \
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register long _arg1 __asm__ ("a0") = (long)(arg1); \
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register long _arg2 __asm__ ("a1") = (long)(arg2); \
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register long _arg4 __asm__ ("a3"); \
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\
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__asm__ volatile ( \
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"addiu $sp, $sp, -32\n" \
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"syscall\n" \
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"addiu $sp, $sp, 32\n" \
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: "=r"(_num), "=r"(_arg4) \
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: "0"(_num), \
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"r"(_arg1), "r"(_arg2) \
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: "memory", "cc", "at", "v1", "hi", "lo", \
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"t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", "t8", "t9" \
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); \
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_arg4 ? -_num : _num; \
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})
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#define my_syscall3(num, arg1, arg2, arg3) \
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({ \
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register long _num __asm__ ("v0") = (num); \
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register long _arg1 __asm__ ("a0") = (long)(arg1); \
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register long _arg2 __asm__ ("a1") = (long)(arg2); \
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register long _arg3 __asm__ ("a2") = (long)(arg3); \
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register long _arg4 __asm__ ("a3"); \
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\
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__asm__ volatile ( \
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"addiu $sp, $sp, -32\n" \
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"syscall\n" \
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"addiu $sp, $sp, 32\n" \
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: "=r"(_num), "=r"(_arg4) \
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: "0"(_num), \
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"r"(_arg1), "r"(_arg2), "r"(_arg3) \
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: "memory", "cc", "at", "v1", "hi", "lo", \
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"t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", "t8", "t9" \
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); \
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_arg4 ? -_num : _num; \
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})
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#define my_syscall4(num, arg1, arg2, arg3, arg4) \
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({ \
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register long _num __asm__ ("v0") = (num); \
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register long _arg1 __asm__ ("a0") = (long)(arg1); \
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register long _arg2 __asm__ ("a1") = (long)(arg2); \
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register long _arg3 __asm__ ("a2") = (long)(arg3); \
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register long _arg4 __asm__ ("a3") = (long)(arg4); \
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\
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__asm__ volatile ( \
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"addiu $sp, $sp, -32\n" \
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"syscall\n" \
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"addiu $sp, $sp, 32\n" \
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: "=r" (_num), "=r"(_arg4) \
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: "0"(_num), \
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"r"(_arg1), "r"(_arg2), "r"(_arg3), "r"(_arg4) \
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: "memory", "cc", "at", "v1", "hi", "lo", \
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"t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", "t8", "t9" \
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); \
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_arg4 ? -_num : _num; \
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})
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#define my_syscall5(num, arg1, arg2, arg3, arg4, arg5) \
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({ \
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register long _num __asm__ ("v0") = (num); \
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register long _arg1 __asm__ ("a0") = (long)(arg1); \
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register long _arg2 __asm__ ("a1") = (long)(arg2); \
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register long _arg3 __asm__ ("a2") = (long)(arg3); \
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register long _arg4 __asm__ ("a3") = (long)(arg4); \
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register long _arg5 = (long)(arg5); \
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\
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__asm__ volatile ( \
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"addiu $sp, $sp, -32\n" \
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"sw %7, 16($sp)\n" \
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"syscall\n " \
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"addiu $sp, $sp, 32\n" \
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: "=r" (_num), "=r"(_arg4) \
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: "0"(_num), \
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"r"(_arg1), "r"(_arg2), "r"(_arg3), "r"(_arg4), "r"(_arg5) \
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: "memory", "cc", "at", "v1", "hi", "lo", \
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"t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", "t8", "t9" \
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); \
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_arg4 ? -_num : _num; \
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})
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char **environ __attribute__((weak));
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const unsigned long *_auxv __attribute__((weak));
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/* startup code, note that it's called __start on MIPS */
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void __attribute__((weak, noreturn, optimize("Os", "omit-frame-pointer"))) __no_stack_protector __start(void)
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{
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__asm__ volatile (
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2023-10-24 12:59:35 +02:00
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/*".set nomips16\n"*/
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".set push\n"
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".set noreorder\n"
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".option pic0\n"
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2023-10-24 12:59:35 +02:00
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#ifdef _NOLIBC_STACKPROTECTOR
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"jal __stack_chk_init\n" /* initialize stack protector */
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"nop\n" /* delayed slot */
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#endif
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/*".ent __start\n"*/
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/*"__start:\n"*/
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"lw $a0,($sp)\n" /* argc was in the stack */
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"addiu $a1, $sp, 4\n" /* argv = sp + 4 */
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"sll $a2, $a0, 2\n" /* a2 = argc * 4 */
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"add $a2, $a2, $a1\n" /* envp = argv + 4*argc ... */
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"addiu $a2, $a2, 4\n" /* ... + 4 */
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"lui $a3, %hi(environ)\n" /* load environ into a3 (hi) */
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"addiu $a3, %lo(environ)\n" /* load environ into a3 (lo) */
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"sw $a2,($a3)\n" /* store envp(a2) into environ */
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"move $t0, $a2\n" /* iterate t0 over envp, look for NULL */
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"0:" /* do { */
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"lw $a3, ($t0)\n" /* a3=*(t0); */
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"bne $a3, $0, 0b\n" /* } while (a3); */
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"addiu $t0, $t0, 4\n" /* delayed slot: t0+=4; */
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"lui $a3, %hi(_auxv)\n" /* load _auxv into a3 (hi) */
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"addiu $a3, %lo(_auxv)\n" /* load _auxv into a3 (lo) */
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"sw $t0, ($a3)\n" /* store t0 into _auxv */
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2023-08-30 17:31:07 +02:00
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"li $t0, -8\n"
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2023-10-24 12:59:35 +02:00
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"and $sp, $sp, $t0\n" /* sp must be 8-byte aligned */
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"addiu $sp,$sp,-16\n" /* the callee expects to save a0..a3 there! */
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"jal main\n" /* main() returns the status code, we'll exit with it. */
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"nop\n" /* delayed slot */
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"move $a0, $v0\n" /* retrieve 32-bit exit code from v0 */
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"li $v0, 4001\n" /* NR_exit == 4001 */
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"syscall\n"
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/*".end __start\n"*/
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".set pop\n"
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);
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__builtin_unreachable();
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}
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2023-10-24 12:59:35 +02:00
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#endif /* _NOLIBC_ARCH_MIPS_H */
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