125 lines
2.8 KiB
YAML
125 lines
2.8 KiB
YAML
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/ata/rockchip,dwc-ahci.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Synopsys DWC AHCI SATA controller for Rockchip devices
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maintainers:
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- Serge Semin <fancer.lancer@gmail.com>
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description:
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This document defines device tree bindings for the Synopsys DWC
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implementation of the AHCI SATA controller found in Rockchip
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devices.
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select:
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properties:
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compatible:
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contains:
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enum:
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- rockchip,rk3568-dwc-ahci
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- rockchip,rk3588-dwc-ahci
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required:
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- compatible
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properties:
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compatible:
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items:
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- enum:
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- rockchip,rk3568-dwc-ahci
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- rockchip,rk3588-dwc-ahci
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- const: snps,dwc-ahci
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ports-implemented:
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const: 1
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sata-port@0:
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$ref: /schemas/ata/snps,dwc-ahci-common.yaml#/$defs/dwc-ahci-port
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properties:
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reg:
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const: 0
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unevaluatedProperties: false
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patternProperties:
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"^sata-port@[1-9a-e]$": false
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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- clock-names
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- ports-implemented
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allOf:
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- $ref: snps,dwc-ahci-common.yaml#
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- if:
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properties:
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compatible:
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contains:
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enum:
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- rockchip,rk3588-dwc-ahci
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then:
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properties:
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clocks:
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maxItems: 5
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clock-names:
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items:
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- const: sata
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- const: pmalive
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- const: rxoob
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- const: ref
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- const: asic
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- if:
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properties:
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compatible:
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contains:
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enum:
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- rockchip,rk3568-dwc-ahci
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then:
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properties:
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clocks:
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maxItems: 3
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clock-names:
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items:
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- const: sata
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- const: pmalive
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- const: rxoob
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/clock/rockchip,rk3588-cru.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/ata/ahci.h>
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#include <dt-bindings/phy/phy.h>
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sata@fe210000 {
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compatible = "rockchip,rk3588-dwc-ahci", "snps,dwc-ahci";
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reg = <0xfe210000 0x1000>;
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clocks = <&cru ACLK_SATA0>, <&cru CLK_PMALIVE0>,
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<&cru CLK_RXOOB0>, <&cru CLK_PIPEPHY0_REF>,
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<&cru CLK_PIPEPHY0_PIPE_ASIC_G>;
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clock-names = "sata", "pmalive", "rxoob", "ref", "asic";
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interrupts = <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH 0>;
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ports-implemented = <0x1>;
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#address-cells = <1>;
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#size-cells = <0>;
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sata-port@0 {
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reg = <0>;
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hba-port-cap = <HBA_PORT_FBSCP>;
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phys = <&combphy0_ps PHY_TYPE_SATA>;
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phy-names = "sata-phy";
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snps,rx-ts-max = <32>;
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snps,tx-ts-max = <32>;
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};
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};
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...
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