147 lines
4.0 KiB
YAML
147 lines
4.0 KiB
YAML
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# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/display/rockchip/rockchip-vop2.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Rockchip SoC display controller (VOP2)
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description:
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VOP2 (Video Output Processor v2) is the display controller for the Rockchip
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series of SoCs which transfers the image data from a video memory
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buffer to an external LCD interface.
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maintainers:
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- Sandy Huang <hjc@rock-chips.com>
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- Heiko Stuebner <heiko@sntech.de>
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properties:
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compatible:
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enum:
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- rockchip,rk3566-vop
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- rockchip,rk3568-vop
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reg:
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items:
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- description:
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Must contain one entry corresponding to the base address and length
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of the register space.
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- description:
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Can optionally contain a second entry corresponding to
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the CRTC gamma LUT address.
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reg-names:
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items:
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- const: vop
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- const: gamma-lut
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interrupts:
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maxItems: 1
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description:
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The VOP interrupt is shared by several interrupt sources, such as
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frame start (VSYNC), line flag and other status interrupts.
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clocks:
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items:
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- description: Clock for ddr buffer transfer.
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- description: Clock for the ahb bus to R/W the phy regs.
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- description: Pixel clock for video port 0.
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- description: Pixel clock for video port 1.
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- description: Pixel clock for video port 2.
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clock-names:
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items:
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- const: aclk
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- const: hclk
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- const: dclk_vp0
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- const: dclk_vp1
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- const: dclk_vp2
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rockchip,grf:
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$ref: /schemas/types.yaml#/definitions/phandle
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description:
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Phandle to GRF regs used for misc control
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ports:
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$ref: /schemas/graph.yaml#/properties/ports
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properties:
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port@0:
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$ref: /schemas/graph.yaml#/properties/port
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description:
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Output endpoint of VP0
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port@1:
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$ref: /schemas/graph.yaml#/properties/port
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description:
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Output endpoint of VP1
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port@2:
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$ref: /schemas/graph.yaml#/properties/port
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description:
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Output endpoint of VP2
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iommus:
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maxItems: 1
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power-domains:
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maxItems: 1
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required:
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- compatible
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- reg
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- reg-names
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- interrupts
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- clocks
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- clock-names
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- ports
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/rk3568-cru.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/power/rk3568-power.h>
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bus {
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#address-cells = <2>;
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#size-cells = <2>;
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vop: vop@fe040000 {
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compatible = "rockchip,rk3568-vop";
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reg = <0x0 0xfe040000 0x0 0x3000>, <0x0 0xfe044000 0x0 0x1000>;
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reg-names = "vop", "gamma-lut";
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interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cru ACLK_VOP>,
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<&cru HCLK_VOP>,
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<&cru DCLK_VOP0>,
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<&cru DCLK_VOP1>,
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<&cru DCLK_VOP2>;
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clock-names = "aclk",
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"hclk",
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"dclk_vp0",
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"dclk_vp1",
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"dclk_vp2";
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power-domains = <&power RK3568_PD_VO>;
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iommus = <&vop_mmu>;
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vop_out: ports {
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#address-cells = <1>;
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#size-cells = <0>;
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vp0: port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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vp1: port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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vp2: port@2 {
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reg = <2>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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};
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};
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};
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