2023-08-30 17:31:07 +02:00
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/display/tegra/nvidia,tegra114-mipi.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: NVIDIA Tegra MIPI pad calibration controller
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maintainers:
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- Thierry Reding <thierry.reding@gmail.com>
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- Jon Hunter <jonathanh@nvidia.com>
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properties:
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$nodename:
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pattern: "^mipi@[0-9a-f]+$"
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compatible:
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enum:
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- nvidia,tegra114-mipi
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- nvidia,tegra210-mipi
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- nvidia,tegra186-mipi
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reg:
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maxItems: 1
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clocks:
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items:
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- description: module clock
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clock-names:
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items:
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- const: mipi-cal
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power-domains:
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maxItems: 1
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"#nvidia,mipi-calibrate-cells":
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description: The number of cells in a MIPI calibration specifier.
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Should be 1. The single cell specifies a bitmask of the pads that
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need to be calibrated for a given device.
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2023-10-24 12:59:35 +02:00
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$ref: /schemas/types.yaml#/definitions/uint32
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2023-08-30 17:31:07 +02:00
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const: 1
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additionalProperties: false
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required:
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- compatible
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- reg
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- clocks
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- "#nvidia,mipi-calibrate-cells"
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examples:
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- |
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#include <dt-bindings/clock/tegra114-car.h>
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mipi@700e3000 {
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compatible = "nvidia,tegra114-mipi";
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reg = <0x700e3000 0x100>;
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clocks = <&tegra_car TEGRA114_CLK_MIPI_CAL>;
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clock-names = "mipi-cal";
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#nvidia,mipi-calibrate-cells = <1>;
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};
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dsia: dsi@54300000 {
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compatible = "nvidia,tegra114-dsi";
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reg = <0x54300000 0x00040000>;
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clocks = <&tegra_car TEGRA114_CLK_DSIA>,
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<&tegra_car TEGRA114_CLK_DSIALP>,
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<&tegra_car TEGRA114_CLK_PLL_D_OUT0>;
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clock-names = "dsi", "lp", "parent";
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resets = <&tegra_car 48>;
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reset-names = "dsi";
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nvidia,mipi-calibrate = <&mipi 0x060>; /* DSIA & DSIB pads */
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};
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