166 lines
4.4 KiB
YAML
166 lines
4.4 KiB
YAML
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/i2c/renesas,rcar-i2c.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Renesas R-Car I2C Controller
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maintainers:
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- Wolfram Sang <wsa+renesas@sang-engineering.com>
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properties:
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compatible:
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oneOf:
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- items:
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- enum:
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- renesas,i2c-r8a7778 # R-Car M1A
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- renesas,i2c-r8a7779 # R-Car H1
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- const: renesas,rcar-gen1-i2c # R-Car Gen1
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- items:
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- enum:
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- renesas,i2c-r8a7742 # RZ/G1H
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- renesas,i2c-r8a7743 # RZ/G1M
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- renesas,i2c-r8a7744 # RZ/G1N
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- renesas,i2c-r8a7745 # RZ/G1E
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- renesas,i2c-r8a77470 # RZ/G1C
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- renesas,i2c-r8a7790 # R-Car H2
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- renesas,i2c-r8a7791 # R-Car M2-W
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- renesas,i2c-r8a7792 # R-Car V2H
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- renesas,i2c-r8a7793 # R-Car M2-N
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- renesas,i2c-r8a7794 # R-Car E2
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- const: renesas,rcar-gen2-i2c # R-Car Gen2 and RZ/G1
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- items:
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- enum:
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- renesas,i2c-r8a774a1 # RZ/G2M
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- renesas,i2c-r8a774b1 # RZ/G2N
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- renesas,i2c-r8a774c0 # RZ/G2E
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- renesas,i2c-r8a774e1 # RZ/G2H
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- renesas,i2c-r8a7795 # R-Car H3
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- renesas,i2c-r8a7796 # R-Car M3-W
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- renesas,i2c-r8a77961 # R-Car M3-W+
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- renesas,i2c-r8a77965 # R-Car M3-N
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- renesas,i2c-r8a77970 # R-Car V3M
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- renesas,i2c-r8a77980 # R-Car V3H
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- renesas,i2c-r8a77990 # R-Car E3
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- renesas,i2c-r8a77995 # R-Car D3
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- const: renesas,rcar-gen3-i2c # R-Car Gen3 and RZ/G2
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- items:
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- enum:
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- renesas,i2c-r8a779a0 # R-Car V3U
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- renesas,i2c-r8a779f0 # R-Car S4-8
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- renesas,i2c-r8a779g0 # R-Car V4H
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- const: renesas,rcar-gen4-i2c # R-Car Gen4
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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clock-frequency:
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description:
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Desired I2C bus clock frequency in Hz. The absence of this property
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indicates the default frequency 100 kHz.
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clocks:
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maxItems: 1
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power-domains:
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maxItems: 1
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resets:
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maxItems: 1
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dmas:
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minItems: 2
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maxItems: 4
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description:
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Must contain a list of pairs of references to DMA specifiers, one for
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transmission, and one for reception.
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dma-names:
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minItems: 2
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maxItems: 4
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items:
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enum:
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- tx
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- rx
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i2c-scl-falling-time-ns:
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default: 35
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description:
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Number of nanoseconds the SCL signal takes to fall; t(f) in the I2C
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specification.
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i2c-scl-internal-delay-ns:
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default: 50
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description:
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Number of nanoseconds the IP core additionally needs to setup SCL.
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i2c-scl-rising-time-ns:
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default: 200
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description:
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Number of nanoseconds the SCL signal takes to rise; t(r) in the I2C
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specification.
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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- power-domains
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- '#address-cells'
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- '#size-cells'
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allOf:
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- $ref: /schemas/i2c/i2c-controller.yaml#
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- if:
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properties:
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compatible:
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contains:
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enum:
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- renesas,rcar-gen1-i2c
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- renesas,rcar-gen2-i2c
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then:
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properties:
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dmas: false
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dma-names: false
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- if:
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properties:
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compatible:
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contains:
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enum:
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- renesas,rcar-gen2-i2c
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- renesas,rcar-gen3-i2c
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- renesas,rcar-gen4-i2c
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then:
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required:
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- resets
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/clock/r8a7791-cpg-mssr.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/power/r8a7791-sysc.h>
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i2c0: i2c@e6508000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
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reg = <0xe6508000 0x40>;
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interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
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clock-frequency = <400000>;
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clocks = <&cpg CPG_MOD 931>;
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power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
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resets = <&cpg 931>;
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i2c-scl-internal-delay-ns = <6>;
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};
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