65 lines
1.5 KiB
YAML
65 lines
1.5 KiB
YAML
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/interrupt-controller/mstar,mst-intc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: MStar Interrupt Controller
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maintainers:
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- Mark-PK Tsai <mark-pk.tsai@mediatek.com>
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description: |+
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MStar, SigmaStar and Mediatek TV SoCs contain multiple legacy
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interrupt controllers that routes interrupts to the GIC.
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The HW block exposes a number of interrupt controllers, each
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can support up to 64 interrupts.
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properties:
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compatible:
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const: mstar,mst-intc
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interrupt-controller: true
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"#interrupt-cells":
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const: 3
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description: |
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Use the same format as specified by GIC in arm,gic.yaml.
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reg:
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maxItems: 1
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mstar,irqs-map-range:
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description: |
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The range <start, end> of parent interrupt controller's interrupt
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lines that are hardwired to mstar interrupt controller.
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$ref: /schemas/types.yaml#/definitions/uint32-matrix
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items:
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minItems: 2
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maxItems: 2
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mstar,intc-no-eoi:
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description:
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Mark this controller has no End Of Interrupt(EOI) implementation.
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type: boolean
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required:
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- compatible
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- reg
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- mstar,irqs-map-range
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additionalProperties: false
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examples:
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- |
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mst_intc0: interrupt-controller@1f2032d0 {
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compatible = "mstar,mst-intc";
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interrupt-controller;
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#interrupt-cells = <3>;
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interrupt-parent = <&gic>;
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reg = <0x1f2032d0 0x30>;
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mstar,irqs-map-range = <0 63>;
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};
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...
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