2023-08-30 17:31:07 +02:00
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# SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
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# Copyright (C) 2019 Texas Instruments Incorporated
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%YAML 1.2
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---
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2023-10-24 12:59:35 +02:00
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$id: http://devicetree.org/schemas/net/ti,dp83869.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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2023-08-30 17:31:07 +02:00
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title: TI DP83869 ethernet PHY
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allOf:
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2023-10-24 12:59:35 +02:00
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- $ref: ethernet-phy.yaml#
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2023-08-30 17:31:07 +02:00
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maintainers:
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- Andrew Davis <afd@ti.com>
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description: |
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The DP83869HM device is a robust, fully-featured Gigabit (PHY) transceiver
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with integrated PMD sublayers that supports 10BASE-Te, 100BASE-TX and
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1000BASE-T Ethernet protocols. The DP83869 also supports 1000BASE-X and
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100BASE-FX Fiber protocols.
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This device interfaces to the MAC layer through Reduced GMII (RGMII) and
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SGMII The DP83869HM supports Media Conversion in Managed mode. In this mode,
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the DP83869HM can run 1000BASE-X-to-1000BASE-T and 100BASE-FX-to-100BASE-TX
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conversions. The DP83869HM can also support Bridge Conversion from RGMII to
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SGMII and SGMII to RGMII.
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Specifications about the Ethernet PHY can be found at:
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http://www.ti.com/lit/ds/symlink/dp83869hm.pdf
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properties:
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reg:
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maxItems: 1
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ti,min-output-impedance:
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type: boolean
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description: |
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MAC Interface Impedance control to set the programmable output impedance
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to a minimum value (35 ohms).
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ti,max-output-impedance:
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type: boolean
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description: |
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MAC Interface Impedance control to set the programmable output impedance
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to a maximum value (70 ohms).
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tx-fifo-depth:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: |
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Transmitt FIFO depth see dt-bindings/net/ti-dp83869.h for values
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rx-fifo-depth:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: |
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Receive FIFO depth see dt-bindings/net/ti-dp83869.h for values
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ti,clk-output-sel:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: |
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Muxing option for CLK_OUT pin see dt-bindings/net/ti-dp83869.h for values.
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ti,op-mode:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: |
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Operational mode for the PHY. If this is not set then the operational
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mode is set by the straps. see dt-bindings/net/ti-dp83869.h for values
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rx-internal-delay-ps:
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description: Delay is in pico seconds
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enum: [ 250, 500, 750, 1000, 1250, 1500, 1750, 2000, 2250, 2500, 2750, 3000,
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3250, 3500, 3750, 4000 ]
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default: 2000
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tx-internal-delay-ps:
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description: Delay is in pico seconds
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enum: [ 250, 500, 750, 1000, 1250, 1500, 1750, 2000, 2250, 2500, 2750, 3000,
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3250, 3500, 3750, 4000 ]
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default: 2000
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required:
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- reg
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/net/ti-dp83869.h>
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mdio0 {
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#address-cells = <1>;
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#size-cells = <0>;
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ethphy0: ethernet-phy@0 {
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reg = <0>;
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tx-fifo-depth = <DP83869_PHYCR_FIFO_DEPTH_4_B_NIB>;
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rx-fifo-depth = <DP83869_PHYCR_FIFO_DEPTH_4_B_NIB>;
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ti,op-mode = <DP83869_RGMII_COPPER_ETHERNET>;
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ti,max-output-impedance;
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ti,clk-output-sel = <DP83869_CLK_O_SEL_CHN_A_RCLK>;
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rx-internal-delay-ps = <2000>;
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tx-internal-delay-ps = <2000>;
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};
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};
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