2023-08-30 17:31:07 +02:00
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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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2023-10-24 12:59:35 +02:00
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$id: http://devicetree.org/schemas/net/toshiba,visconti-dwmac.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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2023-08-30 17:31:07 +02:00
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title: Toshiba Visconti DWMAC Ethernet controller
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maintainers:
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- Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
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select:
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properties:
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compatible:
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contains:
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enum:
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- toshiba,visconti-dwmac
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required:
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- compatible
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allOf:
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2023-10-24 12:59:35 +02:00
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- $ref: snps,dwmac.yaml#
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2023-08-30 17:31:07 +02:00
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properties:
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compatible:
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oneOf:
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- items:
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- enum:
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- toshiba,visconti-dwmac
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- const: snps,dwmac-4.20a
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reg:
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maxItems: 1
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clocks:
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items:
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- description: main clock
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- description: PHY reference clock
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clock-names:
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items:
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- const: stmmaceth
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- const: phy_ref_clk
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required:
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- compatible
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- reg
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- clocks
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- clock-names
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/clock/toshiba,tmpv770x.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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piether: ethernet@28000000 {
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compatible = "toshiba,visconti-dwmac", "snps,dwmac-4.20a";
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reg = <0 0x28000000 0 0x10000>;
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interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "macirq";
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clocks = <&pismu TMPV770X_CLK_PIETHER_BUS>, <&pismu TMPV770X_CLK_PIETHER_125M>;
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clock-names = "stmmaceth", "phy_ref_clk";
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snps,txpbl = <4>;
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snps,rxpbl = <4>;
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snps,tso;
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phy-mode = "rgmii-id";
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phy-handle = <&phy0>;
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mdio {
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#address-cells = <0x1>;
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#size-cells = <0x0>;
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compatible = "snps,dwmac-mdio";
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phy0: ethernet-phy@1 {
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device_type = "ethernet-phy";
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reg = <0x1>;
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};
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};
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};
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};
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