60 lines
1.6 KiB
YAML
60 lines
1.6 KiB
YAML
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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/phy/microchip,lan966x-serdes.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Microchip Lan966x Serdes controller
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maintainers:
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- Horatiu Vultur <horatiu.vultur@microchip.com>
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description: |
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Lan966x has 7 interfaces, consisting of 2 copper transceivers(CU),
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3 SERDES6G and 2 RGMII interfaces. Two of the SERDES6G support QSGMII.
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Also it has 8 logical Ethernet ports which can be connected to these
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interfaces. The Serdes controller will allow to configure these interfaces
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and allows to "mux" the interfaces to different ports.
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For simple selection of the interface that is used with a port, the
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following macros are defined CU(X), SERDES6G(X), RGMII(X). Where X is a
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number that represents the index of that interface type. For example
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CU(1) means use interface copper transceivers 1. SERDES6G(2) means use
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interface SerDes 2.
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properties:
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$nodename:
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pattern: "^serdes@[0-9a-f]+$"
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compatible:
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const: microchip,lan966x-serdes
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reg:
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items:
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- description: HSIO registers
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- description: HW_STAT register
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'#phy-cells':
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const: 2
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description: |
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- Input port to use for a given macro.
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- The macro to be used. The macros are defined in
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dt-bindings/phy/phy-lan966x-serdes.
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required:
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- compatible
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- reg
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- '#phy-cells'
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additionalProperties: false
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examples:
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- |
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serdes: serdes@e2004010 {
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compatible = "microchip,lan966x-serdes";
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reg = <0xe202c000 0x9c>, <0xe2004010 0x4>;
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#phy-cells = <2>;
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};
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...
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