2023-08-30 17:31:07 +02:00
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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2023-10-24 12:59:35 +02:00
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$id: http://devicetree.org/schemas/phy/qcom,usb-hs-28nm.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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2023-08-30 17:31:07 +02:00
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title: Qualcomm Synopsys DesignWare Core 28nm High-Speed PHY
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maintainers:
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- Bryan O'Donoghue <bryan.odonoghue@linaro.org>
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description: |
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Qualcomm Low-Speed, Full-Speed, Hi-Speed 28nm USB PHY
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properties:
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compatible:
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enum:
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- qcom,usb-hs-28nm-femtophy
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reg:
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maxItems: 1
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"#phy-cells":
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const: 0
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clocks:
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items:
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- description: rpmcc ref clock
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- description: PHY AHB clock
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- description: Rentention clock
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clock-names:
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items:
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- const: ref
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- const: ahb
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- const: sleep
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resets:
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items:
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- description: PHY core reset
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- description: POR reset
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reset-names:
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items:
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- const: phy
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- const: por
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vdd-supply:
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description: phandle to the regulator VDD supply node.
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vdda1p8-supply:
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description: phandle to the regulator 1.8V supply node.
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vdda3p3-supply:
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description: phandle to the regulator 3.3V supply node.
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required:
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- compatible
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- reg
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- "#phy-cells"
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- clocks
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- clock-names
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- resets
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- reset-names
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- vdd-supply
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- vdda1p8-supply
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- vdda3p3-supply
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/qcom,gcc-qcs404.h>
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#include <dt-bindings/clock/qcom,rpmcc.h>
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usb2_phy_prim: phy@7a000 {
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compatible = "qcom,usb-hs-28nm-femtophy";
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reg = <0x0007a000 0x200>;
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#phy-cells = <0>;
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clocks = <&rpmcc RPM_SMD_LN_BB_CLK>,
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<&gcc GCC_USB_HS_PHY_CFG_AHB_CLK>,
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<&gcc GCC_USB2A_PHY_SLEEP_CLK>;
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clock-names = "ref", "ahb", "sleep";
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resets = <&gcc GCC_USB_HS_PHY_CFG_AHB_BCR>,
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<&gcc GCC_USB2A_PHY_BCR>;
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reset-names = "phy", "por";
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vdd-supply = <&vreg_l4_1p2>;
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vdda1p8-supply = <&vreg_l5_1p8>;
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vdda3p3-supply = <&vreg_l12_3p3>;
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};
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...
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