124 lines
2.7 KiB
YAML
124 lines
2.7 KiB
YAML
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/phy/renesas,rcar-gen2-usb-phy.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Renesas R-Car Gen2 USB PHY
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maintainers:
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- Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
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properties:
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compatible:
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items:
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- enum:
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- renesas,usb-phy-r8a7742 # RZ/G1H
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- renesas,usb-phy-r8a7743 # RZ/G1M
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- renesas,usb-phy-r8a7744 # RZ/G1N
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- renesas,usb-phy-r8a7745 # RZ/G1E
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- renesas,usb-phy-r8a77470 # RZ/G1C
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- renesas,usb-phy-r8a7790 # R-Car H2
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- renesas,usb-phy-r8a7791 # R-Car M2-W
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- renesas,usb-phy-r8a7794 # R-Car E2
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- const: renesas,rcar-gen2-usb-phy # R-Car Gen2 or RZ/G1
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reg:
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maxItems: 1
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'#address-cells':
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const: 1
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'#size-cells':
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const: 0
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clocks:
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maxItems: 1
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clock-names:
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items:
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- const: usbhs
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power-domains:
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maxItems: 1
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resets:
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maxItems: 1
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patternProperties:
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"^usb-phy@[02]$":
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type: object
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description: Subnode corresponding to a USB channel.
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properties:
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reg:
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description: FIXME RZ/G1C supports channel 0 only
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enum: [0, 2]
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'#phy-cells':
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description: |
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The phandle's argument in the PHY specifier is the USB controller
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selector for the USB channel.
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For RZ/G1C:
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- 0 for EHCI/OHCI
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- 1 for HS-USB
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For all other SoCS:
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- 0 for PCI EHCI/OHCI
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- 1 for HS-USB (channel 0) or xHCI (channel 2)
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const: 1
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required:
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- reg
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- '#phy-cells'
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additionalProperties: false
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required:
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- compatible
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- reg
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- '#address-cells'
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- '#size-cells'
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- clocks
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- clock-names
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- resets
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- power-domains
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- usb-phy@0
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if:
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properties:
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compatible:
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contains:
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const: renesas,usb-phy-r8a77470
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then:
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properties:
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usb-phy@2: false
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else:
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required:
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- usb-phy@2
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/r8a7790-cpg-mssr.h>
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#include <dt-bindings/power/r8a7790-sysc.h>
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usb-phy-controller@e6590100 {
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compatible = "renesas,usb-phy-r8a7790", "renesas,rcar-gen2-usb-phy";
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reg = <0xe6590100 0x100>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&cpg CPG_MOD 704>;
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clock-names = "usbhs";
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power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
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resets = <&cpg 704>;
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usb0: usb-phy@0 {
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reg = <0>;
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#phy-cells = <1>;
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};
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usb2: usb-phy@2 {
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reg = <2>;
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#phy-cells = <1>;
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};
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};
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