144 lines
3.2 KiB
YAML
144 lines
3.2 KiB
YAML
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/phy/socionext,uniphier-usb3ss-phy.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Socionext UniPhier USB3 Super-Speed (SS) PHY
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description: |
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This describes the devicetree bindings for PHY interfaces built into
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USB3 controller implemented on Socionext UniPhier SoCs.
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Although the controller includes High-Speed PHY and Super-Speed PHY,
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this describes about Super-Speed PHY.
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maintainers:
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- Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
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properties:
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compatible:
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enum:
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- socionext,uniphier-pro4-usb3-ssphy
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- socionext,uniphier-pro5-usb3-ssphy
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- socionext,uniphier-pxs2-usb3-ssphy
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- socionext,uniphier-ld20-usb3-ssphy
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- socionext,uniphier-pxs3-usb3-ssphy
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- socionext,uniphier-nx1-usb3-ssphy
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reg:
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maxItems: 1
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"#phy-cells":
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const: 0
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clocks:
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minItems: 2
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maxItems: 3
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clock-names: true
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resets:
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maxItems: 2
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reset-names: true
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vbus-supply:
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description: A phandle to the regulator for USB VBUS, only for USB host
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allOf:
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- if:
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properties:
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compatible:
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contains:
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enum:
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- socionext,uniphier-pro4-usb3-ssphy
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- socionext,uniphier-pro5-usb3-ssphy
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then:
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properties:
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clocks:
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minItems: 2
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maxItems: 2
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clock-names:
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items:
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- const: gio
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- const: link
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resets:
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minItems: 2
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maxItems: 2
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reset-names:
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items:
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- const: gio
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- const: link
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- if:
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properties:
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compatible:
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contains:
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enum:
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- socionext,uniphier-pxs2-usb3-ssphy
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- socionext,uniphier-ld20-usb3-ssphy
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then:
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properties:
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clocks:
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minItems: 2
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maxItems: 2
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clock-names:
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items:
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- const: link
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- const: phy
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resets:
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minItems: 2
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maxItems: 2
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reset-names:
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items:
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- const: link
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- const: phy
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- if:
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properties:
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compatible:
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contains:
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enum:
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- socionext,uniphier-pxs3-usb3-ssphy
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- socionext,uniphier-nx1-usb3-ssphy
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then:
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properties:
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clocks:
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minItems: 2
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maxItems: 3
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clock-names:
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minItems: 2
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items:
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- const: link
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- const: phy
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- const: phy-ext
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resets:
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minItems: 2
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maxItems: 2
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reset-names:
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items:
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- const: link
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- const: phy
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required:
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- compatible
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- reg
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- "#phy-cells"
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- clocks
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- clock-names
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- resets
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- reset-names
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additionalProperties: false
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examples:
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- |
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usb_ssphy0: phy@300 {
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compatible = "socionext,uniphier-ld20-usb3-ssphy";
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reg = <0x300 0x10>;
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#phy-cells = <0>;
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clock-names = "link", "phy";
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clocks = <&sys_clk 14>, <&sys_clk 16>;
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reset-names = "link", "phy";
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resets = <&sys_rst 14>, <&sys_rst 16>;
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vbus-supply = <&usb_vbus0>;
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};
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