2023-08-30 17:31:07 +02:00
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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# Copyright (C) 2022 Microchip Technology, Inc. and its subsidiaries
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/rtc/atmel,at91sam9260-rtt.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Atmel AT91 RTT
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allOf:
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2023-10-24 12:59:35 +02:00
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- $ref: rtc.yaml#
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2023-08-30 17:31:07 +02:00
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maintainers:
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- Alexandre Belloni <alexandre.belloni@bootlin.com>
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properties:
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compatible:
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oneOf:
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- items:
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- const: atmel,at91sam9260-rtt
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- items:
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- const: microchip,sam9x60-rtt
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- const: atmel,at91sam9260-rtt
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- items:
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- const: microchip,sama7g5-rtt
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- const: microchip,sam9x60-rtt
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- const: atmel,at91sam9260-rtt
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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clocks:
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maxItems: 1
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atmel,rtt-rtc-time-reg:
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$ref: /schemas/types.yaml#/definitions/phandle-array
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items:
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- items:
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- description: Phandle to the GPBR node.
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- description: Offset within the GPBR block.
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description:
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Should encode the GPBR register used to store the time base when the
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RTT is used as an RTC. The first cell should point to the GPBR node
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and the second one encodes the offset within the GPBR block (or in
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other words, the GPBR register used to store the time base).
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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- atmel,rtt-rtc-time-reg
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/irq.h>
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rtc@fffffd20 {
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compatible = "atmel,at91sam9260-rtt";
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reg = <0xfffffd20 0x10>;
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interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
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clocks = <&clk32k>;
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atmel,rtt-rtc-time-reg = <&gpbr 0x0>;
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};
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