2023-08-30 17:31:07 +02:00
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/soc/imx/fsl,imx93-media-blk-ctrl.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: NXP i.MX93 Media blk-ctrl
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maintainers:
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- Peng Fan <peng.fan@nxp.com>
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description:
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The i.MX93 MEDIAMIX domain contains control and status registers known
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as MEDIAMIX Block Control (MEDIAMIX BLK_CTRL). These registers include
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clocking, reset, and miscellaneous top-level controls for peripherals
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within the MEDIAMIX domain
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properties:
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compatible:
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items:
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- const: fsl,imx93-media-blk-ctrl
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- const: syscon
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reg:
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maxItems: 1
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'#power-domain-cells':
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const: 1
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power-domains:
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maxItems: 1
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clocks:
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maxItems: 10
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clock-names:
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items:
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- const: apb
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- const: axi
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- const: nic
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- const: disp
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- const: cam
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- const: pxp
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- const: lcdif
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- const: isi
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- const: csi
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- const: dsi
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required:
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- compatible
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- reg
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- power-domains
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- clocks
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- clock-names
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/imx93-clock.h>
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#include <dt-bindings/power/fsl,imx93-power.h>
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2023-10-24 12:59:35 +02:00
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system-controller@4ac10000 {
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2023-08-30 17:31:07 +02:00
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compatible = "fsl,imx93-media-blk-ctrl", "syscon";
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reg = <0x4ac10000 0x10000>;
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power-domains = <&mediamix>;
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clocks = <&clk IMX93_CLK_MEDIA_APB>,
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<&clk IMX93_CLK_MEDIA_AXI>,
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<&clk IMX93_CLK_NIC_MEDIA_GATE>,
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<&clk IMX93_CLK_MEDIA_DISP_PIX>,
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<&clk IMX93_CLK_CAM_PIX>,
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<&clk IMX93_CLK_PXP_GATE>,
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<&clk IMX93_CLK_LCDIF_GATE>,
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<&clk IMX93_CLK_ISI_GATE>,
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<&clk IMX93_CLK_MIPI_CSI_GATE>,
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<&clk IMX93_CLK_MIPI_DSI_GATE>;
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clock-names = "apb", "axi", "nic", "disp", "cam",
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"pxp", "lcdif", "isi", "csi", "dsi";
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#power-domain-cells = <1>;
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};
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