2023-08-30 17:31:07 +02:00
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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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2023-10-24 12:59:35 +02:00
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$id: http://devicetree.org/schemas/sound/wlf,wm8903.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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2023-08-30 17:31:07 +02:00
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title: WM8903 audio codec
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description: |
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This device supports I2C only.
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Pins on the device (for linking into audio routes):
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* IN1L
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* IN1R
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* IN2L
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* IN2R
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* IN3L
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* IN3R
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* DMICDAT
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* HPOUTL
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* HPOUTR
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* LINEOUTL
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* LINEOUTR
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* LOP
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* LON
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* ROP
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* RON
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* MICBIAS
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maintainers:
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- patches@opensource.cirrus.com
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properties:
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compatible:
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const: wlf,wm8903
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reg:
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maxItems: 1
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gpio-controller: true
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'#gpio-cells':
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const: 2
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interrupts:
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maxItems: 1
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micdet-cfg:
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$ref: /schemas/types.yaml#/definitions/uint32
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default: 0
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description: Default register value for R6 (Mic Bias).
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micdet-delay:
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$ref: /schemas/types.yaml#/definitions/uint32
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default: 100
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description: The debounce delay for microphone detection in mS.
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gpio-cfg:
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$ref: /schemas/types.yaml#/definitions/uint32-array
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description: |
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minItems: 5
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maxItems: 5
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A list of GPIO configuration register values.
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If absent, no configuration of these registers is performed.
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If any entry has the value 0xffffffff, that GPIO's
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configuration will not be modified.
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AVDD-supply:
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description: Analog power supply regulator on the AVDD pin.
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CPVDD-supply:
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description: Charge pump supply regulator on the CPVDD pin.
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DBVDD-supply:
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description: Digital buffer supply regulator for the DBVDD pin.
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DCVDD-supply:
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description: Digital core supply regulator for the DCVDD pin.
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required:
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- compatible
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- reg
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- gpio-controller
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- '#gpio-cells'
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additionalProperties: false
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examples:
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- |
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i2c {
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#address-cells = <1>;
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#size-cells = <0>;
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wm8903: codec@1a {
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compatible = "wlf,wm8903";
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reg = <0x1a>;
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interrupts = <347>;
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AVDD-supply = <&fooreg_a>;
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CPVDD-supply = <&fooreg_b>;
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DBVDD-supply = <&fooreg_c>;
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DCVDD-supply = <&fooreg_d>;
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gpio-controller;
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#gpio-cells = <2>;
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micdet-cfg = <0>;
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micdet-delay = <100>;
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gpio-cfg = <
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0x0600 /* DMIC_LR, output */
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0x0680 /* DMIC_DAT, input */
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0x0000 /* GPIO, output, low */
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0x0200 /* Interrupt, output */
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0x01a0 /* BCLK, input, active high */
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>;
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};
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};
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