2023-08-30 17:31:07 +02:00
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/spi/spi-xilinx.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Xilinx SPI controller
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maintainers:
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2023-10-24 12:59:35 +02:00
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- Michal Simek <michal.simek@amd.com>
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2023-08-30 17:31:07 +02:00
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allOf:
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- $ref: spi-controller.yaml#
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properties:
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compatible:
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enum:
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- xlnx,xps-spi-2.00.a
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- xlnx,xps-spi-2.00.b
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- xlnx,axi-quad-spi-1.00.a
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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xlnx,num-ss-bits:
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description: Number of chip selects used.
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minimum: 1
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maximum: 32
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xlnx,num-transfer-bits:
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description: Number of bits per transfer. This will be 8 if not specified.
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enum: [8, 16, 32]
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default: 8
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required:
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- compatible
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- reg
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- interrupts
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unevaluatedProperties: false
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examples:
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- |
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spi0: spi@41e00000 {
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compatible = "xlnx,xps-spi-2.00.a";
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interrupt-parent = <&intc>;
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interrupts = <0 31 1>;
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reg = <0x41e00000 0x10000>;
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xlnx,num-ss-bits = <0x1>;
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xlnx,num-transfer-bits = <32>;
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};
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...
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