2023-08-30 17:31:07 +02:00
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/timer/cdns,ttc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Cadence TTC - Triple Timer Counter
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maintainers:
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2023-10-24 12:59:35 +02:00
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- Michal Simek <michal.simek@amd.com>
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2023-08-30 17:31:07 +02:00
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properties:
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compatible:
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const: cdns,ttc
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reg:
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maxItems: 1
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interrupts:
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maxItems: 3
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description: |
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A list of 3 interrupts; one per timer channel.
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clocks:
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maxItems: 1
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power-domains:
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maxItems: 1
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timer-width:
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2023-10-24 12:59:35 +02:00
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$ref: /schemas/types.yaml#/definitions/uint32
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2023-08-30 17:31:07 +02:00
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description: |
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Bit width of the timer, necessary if not 16.
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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additionalProperties: false
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examples:
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- |
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ttc0: ttc0@f8001000 {
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interrupt-parent = <&intc>;
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interrupts = <0 10 4>, <0 11 4>, <0 12 4>;
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compatible = "cdns,ttc";
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reg = <0xF8001000 0x1000>;
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clocks = <&cpu_clk 3>;
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timer-width = <32>;
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};
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