2023-08-30 17:31:07 +02:00
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/* SPDX-License-Identifier: GPL-2.0 */
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/* $Id: cache.h,v 1.6 2004/03/11 18:08:05 lethal Exp $
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*
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* include/asm-sh/cache.h
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*
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* Copyright 1999 (C) Niibe Yutaka
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* Copyright 2002, 2003 (C) Paul Mundt
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*/
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#ifndef __ASM_SH_CACHE_H
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#define __ASM_SH_CACHE_H
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#include <linux/init.h>
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#include <cpu/cache.h>
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#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
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2023-10-24 12:59:35 +02:00
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/*
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* Some drivers need to perform DMA into kmalloc'ed buffers
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* and so we have to increase the kmalloc minalign for this.
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*/
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#define ARCH_DMA_MINALIGN L1_CACHE_BYTES
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2023-08-30 17:31:07 +02:00
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#define __read_mostly __section(".data..read_mostly")
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#ifndef __ASSEMBLY__
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struct cache_info {
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unsigned int ways; /* Number of cache ways */
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unsigned int sets; /* Number of cache sets */
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unsigned int linesz; /* Cache line size (bytes) */
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unsigned int way_size; /* sets * line size */
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/*
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* way_incr is the address offset for accessing the next way
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* in memory mapped cache array ops.
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*/
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unsigned int way_incr;
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unsigned int entry_shift;
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unsigned int entry_mask;
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/*
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* Compute a mask which selects the address bits which overlap between
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* 1. those used to select the cache set during indexing
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* 2. those in the physical page number.
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*/
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unsigned int alias_mask;
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unsigned int n_aliases; /* Number of aliases */
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unsigned long flags;
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};
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#endif /* __ASSEMBLY__ */
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#endif /* __ASM_SH_CACHE_H */
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