2023-08-30 17:31:07 +02:00
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/* SPDX-License-Identifier: GPL-2.0
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*
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* include/asm-sh/dreamcast/sysasic.h
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*
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* Definitions for the Dreamcast System ASIC and related peripherals.
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*
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* Copyright (c) 2001 M. R. Brown <mrbrown@linuxdc.org>
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* Copyright (C) 2003 Paul Mundt <lethal@linux-sh.org>
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*
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* This file is part of the LinuxDC project (www.linuxdc.org)
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*/
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#ifndef __ASM_SH_DREAMCAST_SYSASIC_H
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#define __ASM_SH_DREAMCAST_SYSASIC_H
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#include <asm/irq.h>
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/* Hardware events -
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Each of these events correspond to a bit within the Event Mask Registers/
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Event Status Registers. Because of the virtual IRQ numbering scheme, a
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base offset must be used when calculating the virtual IRQ that each event
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takes.
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*/
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2023-10-24 12:59:35 +02:00
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#define HW_EVENT_IRQ_BASE (48 + 16)
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2023-08-30 17:31:07 +02:00
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/* IRQ 13 */
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#define HW_EVENT_VSYNC (HW_EVENT_IRQ_BASE + 5) /* VSync */
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#define HW_EVENT_MAPLE_DMA (HW_EVENT_IRQ_BASE + 12) /* Maple DMA complete */
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#define HW_EVENT_GDROM_DMA (HW_EVENT_IRQ_BASE + 14) /* GD-ROM DMA complete */
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#define HW_EVENT_G2_DMA (HW_EVENT_IRQ_BASE + 15) /* G2 DMA complete */
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#define HW_EVENT_PVR2_DMA (HW_EVENT_IRQ_BASE + 19) /* PVR2 DMA complete */
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/* IRQ 11 */
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#define HW_EVENT_GDROM_CMD (HW_EVENT_IRQ_BASE + 32) /* GD-ROM cmd. complete */
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#define HW_EVENT_AICA_SYS (HW_EVENT_IRQ_BASE + 33) /* AICA-related */
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#define HW_EVENT_EXTERNAL (HW_EVENT_IRQ_BASE + 35) /* Ext. (expansion) */
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#define HW_EVENT_IRQ_MAX (HW_EVENT_IRQ_BASE + 95)
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/* arch/sh/boards/mach-dreamcast/irq.c */
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extern int systemasic_irq_demux(int);
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extern void systemasic_irq_init(void);
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#endif /* __ASM_SH_DREAMCAST_SYSASIC_H */
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