543 lines
18 KiB
C
543 lines
18 KiB
C
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/* SPDX-License-Identifier: GPL-2.0 */
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/******************************************************************************
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* x86_emulate.h
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*
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* Generic x86 (32-bit and 64-bit) instruction decoder and emulator.
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*
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* Copyright (c) 2005 Keir Fraser
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*
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* From: xen-unstable 10676:af9809f51f81a3c43f276f00c81a52ef558afda4
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*/
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#ifndef _ASM_X86_KVM_X86_EMULATE_H
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#define _ASM_X86_KVM_X86_EMULATE_H
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#include <asm/desc_defs.h>
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#include "fpu.h"
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struct x86_emulate_ctxt;
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enum x86_intercept;
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enum x86_intercept_stage;
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struct x86_exception {
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u8 vector;
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bool error_code_valid;
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u16 error_code;
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bool nested_page_fault;
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u64 address; /* cr2 or nested page fault gpa */
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u8 async_page_fault;
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};
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/*
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* This struct is used to carry enough information from the instruction
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* decoder to main KVM so that a decision can be made whether the
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* instruction needs to be intercepted or not.
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*/
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struct x86_instruction_info {
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u8 intercept; /* which intercept */
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u8 rep_prefix; /* rep prefix? */
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u8 modrm_mod; /* mod part of modrm */
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u8 modrm_reg; /* index of register used */
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u8 modrm_rm; /* rm part of modrm */
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u64 src_val; /* value of source operand */
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u64 dst_val; /* value of destination operand */
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u8 src_bytes; /* size of source operand */
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u8 dst_bytes; /* size of destination operand */
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u8 ad_bytes; /* size of src/dst address */
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u64 next_rip; /* rip following the instruction */
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};
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/*
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* x86_emulate_ops:
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*
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* These operations represent the instruction emulator's interface to memory.
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* There are two categories of operation: those that act on ordinary memory
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* regions (*_std), and those that act on memory regions known to require
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* special treatment or emulation (*_emulated).
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*
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* The emulator assumes that an instruction accesses only one 'emulated memory'
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* location, that this location is the given linear faulting address (cr2), and
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* that this is one of the instruction's data operands. Instruction fetches and
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* stack operations are assumed never to access emulated memory. The emulator
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* automatically deduces which operand of a string-move operation is accessing
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* emulated memory, and assumes that the other operand accesses normal memory.
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*
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* NOTES:
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* 1. The emulator isn't very smart about emulated vs. standard memory.
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* 'Emulated memory' access addresses should be checked for sanity.
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* 'Normal memory' accesses may fault, and the caller must arrange to
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* detect and handle reentrancy into the emulator via recursive faults.
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* Accesses may be unaligned and may cross page boundaries.
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* 2. If the access fails (cannot emulate, or a standard access faults) then
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* it is up to the memop to propagate the fault to the guest VM via
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* some out-of-band mechanism, unknown to the emulator. The memop signals
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* failure by returning X86EMUL_PROPAGATE_FAULT to the emulator, which will
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* then immediately bail.
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* 3. Valid access sizes are 1, 2, 4 and 8 bytes. On x86/32 systems only
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* cmpxchg8b_emulated need support 8-byte accesses.
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* 4. The emulator cannot handle 64-bit mode emulation on an x86/32 system.
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*/
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/* Access completed successfully: continue emulation as normal. */
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#define X86EMUL_CONTINUE 0
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/* Access is unhandleable: bail from emulation and return error to caller. */
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#define X86EMUL_UNHANDLEABLE 1
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/* Terminate emulation but return success to the caller. */
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#define X86EMUL_PROPAGATE_FAULT 2 /* propagate a generated fault to guest */
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#define X86EMUL_RETRY_INSTR 3 /* retry the instruction for some reason */
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#define X86EMUL_CMPXCHG_FAILED 4 /* cmpxchg did not see expected value */
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#define X86EMUL_IO_NEEDED 5 /* IO is needed to complete emulation */
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#define X86EMUL_INTERCEPTED 6 /* Intercepted by nested VMCB/VMCS */
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struct x86_emulate_ops {
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void (*vm_bugged)(struct x86_emulate_ctxt *ctxt);
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/*
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* read_gpr: read a general purpose register (rax - r15)
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*
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* @reg: gpr number.
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*/
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ulong (*read_gpr)(struct x86_emulate_ctxt *ctxt, unsigned reg);
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/*
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* write_gpr: write a general purpose register (rax - r15)
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*
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* @reg: gpr number.
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* @val: value to write.
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*/
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void (*write_gpr)(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val);
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/*
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* read_std: Read bytes of standard (non-emulated/special) memory.
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* Used for descriptor reading.
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* @addr: [IN ] Linear address from which to read.
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* @val: [OUT] Value read from memory, zero-extended to 'u_long'.
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* @bytes: [IN ] Number of bytes to read from memory.
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* @system:[IN ] Whether the access is forced to be at CPL0.
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*/
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int (*read_std)(struct x86_emulate_ctxt *ctxt,
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unsigned long addr, void *val,
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unsigned int bytes,
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struct x86_exception *fault, bool system);
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/*
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* write_std: Write bytes of standard (non-emulated/special) memory.
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* Used for descriptor writing.
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* @addr: [IN ] Linear address to which to write.
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* @val: [OUT] Value write to memory, zero-extended to 'u_long'.
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* @bytes: [IN ] Number of bytes to write to memory.
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* @system:[IN ] Whether the access is forced to be at CPL0.
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*/
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int (*write_std)(struct x86_emulate_ctxt *ctxt,
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unsigned long addr, void *val, unsigned int bytes,
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struct x86_exception *fault, bool system);
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/*
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* fetch: Read bytes of standard (non-emulated/special) memory.
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* Used for instruction fetch.
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* @addr: [IN ] Linear address from which to read.
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* @val: [OUT] Value read from memory, zero-extended to 'u_long'.
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* @bytes: [IN ] Number of bytes to read from memory.
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*/
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int (*fetch)(struct x86_emulate_ctxt *ctxt,
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unsigned long addr, void *val, unsigned int bytes,
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struct x86_exception *fault);
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/*
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* read_emulated: Read bytes from emulated/special memory area.
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* @addr: [IN ] Linear address from which to read.
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* @val: [OUT] Value read from memory, zero-extended to 'u_long'.
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* @bytes: [IN ] Number of bytes to read from memory.
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*/
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int (*read_emulated)(struct x86_emulate_ctxt *ctxt,
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unsigned long addr, void *val, unsigned int bytes,
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struct x86_exception *fault);
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/*
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* write_emulated: Write bytes to emulated/special memory area.
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* @addr: [IN ] Linear address to which to write.
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* @val: [IN ] Value to write to memory (low-order bytes used as
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* required).
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* @bytes: [IN ] Number of bytes to write to memory.
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*/
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int (*write_emulated)(struct x86_emulate_ctxt *ctxt,
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unsigned long addr, const void *val,
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unsigned int bytes,
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struct x86_exception *fault);
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/*
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* cmpxchg_emulated: Emulate an atomic (LOCKed) CMPXCHG operation on an
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* emulated/special memory area.
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* @addr: [IN ] Linear address to access.
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* @old: [IN ] Value expected to be current at @addr.
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* @new: [IN ] Value to write to @addr.
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* @bytes: [IN ] Number of bytes to access using CMPXCHG.
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*/
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int (*cmpxchg_emulated)(struct x86_emulate_ctxt *ctxt,
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unsigned long addr,
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const void *old,
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const void *new,
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unsigned int bytes,
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struct x86_exception *fault);
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void (*invlpg)(struct x86_emulate_ctxt *ctxt, ulong addr);
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int (*pio_in_emulated)(struct x86_emulate_ctxt *ctxt,
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int size, unsigned short port, void *val,
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unsigned int count);
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int (*pio_out_emulated)(struct x86_emulate_ctxt *ctxt,
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int size, unsigned short port, const void *val,
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unsigned int count);
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bool (*get_segment)(struct x86_emulate_ctxt *ctxt, u16 *selector,
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struct desc_struct *desc, u32 *base3, int seg);
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void (*set_segment)(struct x86_emulate_ctxt *ctxt, u16 selector,
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struct desc_struct *desc, u32 base3, int seg);
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unsigned long (*get_cached_segment_base)(struct x86_emulate_ctxt *ctxt,
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int seg);
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void (*get_gdt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt);
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void (*get_idt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt);
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void (*set_gdt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt);
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void (*set_idt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt);
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ulong (*get_cr)(struct x86_emulate_ctxt *ctxt, int cr);
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int (*set_cr)(struct x86_emulate_ctxt *ctxt, int cr, ulong val);
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int (*cpl)(struct x86_emulate_ctxt *ctxt);
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void (*get_dr)(struct x86_emulate_ctxt *ctxt, int dr, ulong *dest);
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int (*set_dr)(struct x86_emulate_ctxt *ctxt, int dr, ulong value);
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int (*set_msr_with_filter)(struct x86_emulate_ctxt *ctxt, u32 msr_index, u64 data);
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int (*get_msr_with_filter)(struct x86_emulate_ctxt *ctxt, u32 msr_index, u64 *pdata);
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int (*get_msr)(struct x86_emulate_ctxt *ctxt, u32 msr_index, u64 *pdata);
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int (*check_pmc)(struct x86_emulate_ctxt *ctxt, u32 pmc);
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int (*read_pmc)(struct x86_emulate_ctxt *ctxt, u32 pmc, u64 *pdata);
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void (*halt)(struct x86_emulate_ctxt *ctxt);
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void (*wbinvd)(struct x86_emulate_ctxt *ctxt);
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int (*fix_hypercall)(struct x86_emulate_ctxt *ctxt);
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int (*intercept)(struct x86_emulate_ctxt *ctxt,
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struct x86_instruction_info *info,
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enum x86_intercept_stage stage);
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bool (*get_cpuid)(struct x86_emulate_ctxt *ctxt, u32 *eax, u32 *ebx,
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u32 *ecx, u32 *edx, bool exact_only);
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bool (*guest_has_long_mode)(struct x86_emulate_ctxt *ctxt);
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bool (*guest_has_movbe)(struct x86_emulate_ctxt *ctxt);
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bool (*guest_has_fxsr)(struct x86_emulate_ctxt *ctxt);
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bool (*guest_has_rdpid)(struct x86_emulate_ctxt *ctxt);
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void (*set_nmi_mask)(struct x86_emulate_ctxt *ctxt, bool masked);
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bool (*is_smm)(struct x86_emulate_ctxt *ctxt);
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bool (*is_guest_mode)(struct x86_emulate_ctxt *ctxt);
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int (*leave_smm)(struct x86_emulate_ctxt *ctxt);
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void (*triple_fault)(struct x86_emulate_ctxt *ctxt);
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int (*set_xcr)(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr);
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};
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/* Type, address-of, and value of an instruction's operand. */
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struct operand {
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enum { OP_REG, OP_MEM, OP_MEM_STR, OP_IMM, OP_XMM, OP_MM, OP_NONE } type;
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unsigned int bytes;
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unsigned int count;
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union {
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unsigned long orig_val;
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u64 orig_val64;
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};
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union {
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unsigned long *reg;
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struct segmented_address {
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ulong ea;
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unsigned seg;
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} mem;
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unsigned xmm;
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unsigned mm;
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} addr;
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union {
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unsigned long val;
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u64 val64;
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char valptr[sizeof(sse128_t)];
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sse128_t vec_val;
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u64 mm_val;
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void *data;
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};
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};
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struct fetch_cache {
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u8 data[15];
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u8 *ptr;
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u8 *end;
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};
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struct read_cache {
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u8 data[1024];
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unsigned long pos;
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unsigned long end;
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};
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/* Execution mode, passed to the emulator. */
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enum x86emul_mode {
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X86EMUL_MODE_REAL, /* Real mode. */
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X86EMUL_MODE_VM86, /* Virtual 8086 mode. */
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X86EMUL_MODE_PROT16, /* 16-bit protected mode. */
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X86EMUL_MODE_PROT32, /* 32-bit protected mode. */
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X86EMUL_MODE_PROT64, /* 64-bit (long) mode. */
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};
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/*
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* fastop functions are declared as taking a never-defined fastop parameter,
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* so they can't be called from C directly.
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*/
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struct fastop;
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typedef void (*fastop_t)(struct fastop *);
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/*
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* The emulator's _regs array tracks only the GPRs, i.e. excludes RIP. RIP is
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* tracked/accessed via _eip, and except for RIP relative addressing, which
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* also uses _eip, RIP cannot be a register operand nor can it be an operand in
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* a ModRM or SIB byte.
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*/
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#ifdef CONFIG_X86_64
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#define NR_EMULATOR_GPRS 16
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#else
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#define NR_EMULATOR_GPRS 8
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#endif
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struct x86_emulate_ctxt {
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void *vcpu;
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const struct x86_emulate_ops *ops;
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/* Register state before/after emulation. */
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unsigned long eflags;
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unsigned long eip; /* eip before instruction emulation */
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/* Emulated execution mode, represented by an X86EMUL_MODE value. */
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enum x86emul_mode mode;
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/* interruptibility state, as a result of execution of STI or MOV SS */
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int interruptibility;
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bool perm_ok; /* do not check permissions if true */
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bool tf; /* TF value before instruction (after for syscall/sysret) */
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bool have_exception;
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struct x86_exception exception;
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/* GPA available */
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bool gpa_available;
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gpa_t gpa_val;
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/*
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* decode cache
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*/
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/* current opcode length in bytes */
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u8 opcode_len;
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u8 b;
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u8 intercept;
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u8 op_bytes;
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u8 ad_bytes;
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union {
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int (*execute)(struct x86_emulate_ctxt *ctxt);
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fastop_t fop;
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};
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||
|
|
int (*check_perm)(struct x86_emulate_ctxt *ctxt);
|
||
|
|
|
||
|
|
bool rip_relative;
|
||
|
|
u8 rex_prefix;
|
||
|
|
u8 lock_prefix;
|
||
|
|
u8 rep_prefix;
|
||
|
|
/* bitmaps of registers in _regs[] that can be read */
|
||
|
|
u16 regs_valid;
|
||
|
|
/* bitmaps of registers in _regs[] that have been written */
|
||
|
|
u16 regs_dirty;
|
||
|
|
/* modrm */
|
||
|
|
u8 modrm;
|
||
|
|
u8 modrm_mod;
|
||
|
|
u8 modrm_reg;
|
||
|
|
u8 modrm_rm;
|
||
|
|
u8 modrm_seg;
|
||
|
|
u8 seg_override;
|
||
|
|
u64 d;
|
||
|
|
unsigned long _eip;
|
||
|
|
|
||
|
|
/* Here begins the usercopy section. */
|
||
|
|
struct operand src;
|
||
|
|
struct operand src2;
|
||
|
|
struct operand dst;
|
||
|
|
struct operand memop;
|
||
|
|
unsigned long _regs[NR_EMULATOR_GPRS];
|
||
|
|
struct operand *memopp;
|
||
|
|
struct fetch_cache fetch;
|
||
|
|
struct read_cache io_read;
|
||
|
|
struct read_cache mem_read;
|
||
|
|
bool is_branch;
|
||
|
|
};
|
||
|
|
|
||
|
|
#define KVM_EMULATOR_BUG_ON(cond, ctxt) \
|
||
|
|
({ \
|
||
|
|
int __ret = (cond); \
|
||
|
|
\
|
||
|
|
if (WARN_ON_ONCE(__ret)) \
|
||
|
|
ctxt->ops->vm_bugged(ctxt); \
|
||
|
|
unlikely(__ret); \
|
||
|
|
})
|
||
|
|
|
||
|
|
/* Repeat String Operation Prefix */
|
||
|
|
#define REPE_PREFIX 0xf3
|
||
|
|
#define REPNE_PREFIX 0xf2
|
||
|
|
|
||
|
|
/* CPUID vendors */
|
||
|
|
#define X86EMUL_CPUID_VENDOR_AuthenticAMD_ebx 0x68747541
|
||
|
|
#define X86EMUL_CPUID_VENDOR_AuthenticAMD_ecx 0x444d4163
|
||
|
|
#define X86EMUL_CPUID_VENDOR_AuthenticAMD_edx 0x69746e65
|
||
|
|
|
||
|
|
#define X86EMUL_CPUID_VENDOR_AMDisbetterI_ebx 0x69444d41
|
||
|
|
#define X86EMUL_CPUID_VENDOR_AMDisbetterI_ecx 0x21726574
|
||
|
|
#define X86EMUL_CPUID_VENDOR_AMDisbetterI_edx 0x74656273
|
||
|
|
|
||
|
|
#define X86EMUL_CPUID_VENDOR_HygonGenuine_ebx 0x6f677948
|
||
|
|
#define X86EMUL_CPUID_VENDOR_HygonGenuine_ecx 0x656e6975
|
||
|
|
#define X86EMUL_CPUID_VENDOR_HygonGenuine_edx 0x6e65476e
|
||
|
|
|
||
|
|
#define X86EMUL_CPUID_VENDOR_GenuineIntel_ebx 0x756e6547
|
||
|
|
#define X86EMUL_CPUID_VENDOR_GenuineIntel_ecx 0x6c65746e
|
||
|
|
#define X86EMUL_CPUID_VENDOR_GenuineIntel_edx 0x49656e69
|
||
|
|
|
||
|
|
#define X86EMUL_CPUID_VENDOR_CentaurHauls_ebx 0x746e6543
|
||
|
|
#define X86EMUL_CPUID_VENDOR_CentaurHauls_ecx 0x736c7561
|
||
|
|
#define X86EMUL_CPUID_VENDOR_CentaurHauls_edx 0x48727561
|
||
|
|
|
||
|
|
static inline bool is_guest_vendor_intel(u32 ebx, u32 ecx, u32 edx)
|
||
|
|
{
|
||
|
|
return ebx == X86EMUL_CPUID_VENDOR_GenuineIntel_ebx &&
|
||
|
|
ecx == X86EMUL_CPUID_VENDOR_GenuineIntel_ecx &&
|
||
|
|
edx == X86EMUL_CPUID_VENDOR_GenuineIntel_edx;
|
||
|
|
}
|
||
|
|
|
||
|
|
static inline bool is_guest_vendor_amd(u32 ebx, u32 ecx, u32 edx)
|
||
|
|
{
|
||
|
|
return (ebx == X86EMUL_CPUID_VENDOR_AuthenticAMD_ebx &&
|
||
|
|
ecx == X86EMUL_CPUID_VENDOR_AuthenticAMD_ecx &&
|
||
|
|
edx == X86EMUL_CPUID_VENDOR_AuthenticAMD_edx) ||
|
||
|
|
(ebx == X86EMUL_CPUID_VENDOR_AMDisbetterI_ebx &&
|
||
|
|
ecx == X86EMUL_CPUID_VENDOR_AMDisbetterI_ecx &&
|
||
|
|
edx == X86EMUL_CPUID_VENDOR_AMDisbetterI_edx);
|
||
|
|
}
|
||
|
|
|
||
|
|
static inline bool is_guest_vendor_hygon(u32 ebx, u32 ecx, u32 edx)
|
||
|
|
{
|
||
|
|
return ebx == X86EMUL_CPUID_VENDOR_HygonGenuine_ebx &&
|
||
|
|
ecx == X86EMUL_CPUID_VENDOR_HygonGenuine_ecx &&
|
||
|
|
edx == X86EMUL_CPUID_VENDOR_HygonGenuine_edx;
|
||
|
|
}
|
||
|
|
|
||
|
|
enum x86_intercept_stage {
|
||
|
|
X86_ICTP_NONE = 0, /* Allow zero-init to not match anything */
|
||
|
|
X86_ICPT_PRE_EXCEPT,
|
||
|
|
X86_ICPT_POST_EXCEPT,
|
||
|
|
X86_ICPT_POST_MEMACCESS,
|
||
|
|
};
|
||
|
|
|
||
|
|
enum x86_intercept {
|
||
|
|
x86_intercept_none,
|
||
|
|
x86_intercept_cr_read,
|
||
|
|
x86_intercept_cr_write,
|
||
|
|
x86_intercept_clts,
|
||
|
|
x86_intercept_lmsw,
|
||
|
|
x86_intercept_smsw,
|
||
|
|
x86_intercept_dr_read,
|
||
|
|
x86_intercept_dr_write,
|
||
|
|
x86_intercept_lidt,
|
||
|
|
x86_intercept_sidt,
|
||
|
|
x86_intercept_lgdt,
|
||
|
|
x86_intercept_sgdt,
|
||
|
|
x86_intercept_lldt,
|
||
|
|
x86_intercept_sldt,
|
||
|
|
x86_intercept_ltr,
|
||
|
|
x86_intercept_str,
|
||
|
|
x86_intercept_rdtsc,
|
||
|
|
x86_intercept_rdpmc,
|
||
|
|
x86_intercept_pushf,
|
||
|
|
x86_intercept_popf,
|
||
|
|
x86_intercept_cpuid,
|
||
|
|
x86_intercept_rsm,
|
||
|
|
x86_intercept_iret,
|
||
|
|
x86_intercept_intn,
|
||
|
|
x86_intercept_invd,
|
||
|
|
x86_intercept_pause,
|
||
|
|
x86_intercept_hlt,
|
||
|
|
x86_intercept_invlpg,
|
||
|
|
x86_intercept_invlpga,
|
||
|
|
x86_intercept_vmrun,
|
||
|
|
x86_intercept_vmload,
|
||
|
|
x86_intercept_vmsave,
|
||
|
|
x86_intercept_vmmcall,
|
||
|
|
x86_intercept_stgi,
|
||
|
|
x86_intercept_clgi,
|
||
|
|
x86_intercept_skinit,
|
||
|
|
x86_intercept_rdtscp,
|
||
|
|
x86_intercept_rdpid,
|
||
|
|
x86_intercept_icebp,
|
||
|
|
x86_intercept_wbinvd,
|
||
|
|
x86_intercept_monitor,
|
||
|
|
x86_intercept_mwait,
|
||
|
|
x86_intercept_rdmsr,
|
||
|
|
x86_intercept_wrmsr,
|
||
|
|
x86_intercept_in,
|
||
|
|
x86_intercept_ins,
|
||
|
|
x86_intercept_out,
|
||
|
|
x86_intercept_outs,
|
||
|
|
x86_intercept_xsetbv,
|
||
|
|
|
||
|
|
nr_x86_intercepts
|
||
|
|
};
|
||
|
|
|
||
|
|
/* Host execution mode. */
|
||
|
|
#if defined(CONFIG_X86_32)
|
||
|
|
#define X86EMUL_MODE_HOST X86EMUL_MODE_PROT32
|
||
|
|
#elif defined(CONFIG_X86_64)
|
||
|
|
#define X86EMUL_MODE_HOST X86EMUL_MODE_PROT64
|
||
|
|
#endif
|
||
|
|
|
||
|
|
int x86_decode_insn(struct x86_emulate_ctxt *ctxt, void *insn, int insn_len, int emulation_type);
|
||
|
|
bool x86_page_table_writing_insn(struct x86_emulate_ctxt *ctxt);
|
||
|
|
#define EMULATION_FAILED -1
|
||
|
|
#define EMULATION_OK 0
|
||
|
|
#define EMULATION_RESTART 1
|
||
|
|
#define EMULATION_INTERCEPTED 2
|
||
|
|
void init_decode_cache(struct x86_emulate_ctxt *ctxt);
|
||
|
|
int x86_emulate_insn(struct x86_emulate_ctxt *ctxt);
|
||
|
|
int emulator_task_switch(struct x86_emulate_ctxt *ctxt,
|
||
|
|
u16 tss_selector, int idt_index, int reason,
|
||
|
|
bool has_error_code, u32 error_code);
|
||
|
|
int emulate_int_real(struct x86_emulate_ctxt *ctxt, int irq);
|
||
|
|
void emulator_invalidate_register_cache(struct x86_emulate_ctxt *ctxt);
|
||
|
|
void emulator_writeback_register_cache(struct x86_emulate_ctxt *ctxt);
|
||
|
|
bool emulator_can_use_gpa(struct x86_emulate_ctxt *ctxt);
|
||
|
|
|
||
|
|
static inline ulong reg_read(struct x86_emulate_ctxt *ctxt, unsigned nr)
|
||
|
|
{
|
||
|
|
if (KVM_EMULATOR_BUG_ON(nr >= NR_EMULATOR_GPRS, ctxt))
|
||
|
|
nr &= NR_EMULATOR_GPRS - 1;
|
||
|
|
|
||
|
|
if (!(ctxt->regs_valid & (1 << nr))) {
|
||
|
|
ctxt->regs_valid |= 1 << nr;
|
||
|
|
ctxt->_regs[nr] = ctxt->ops->read_gpr(ctxt, nr);
|
||
|
|
}
|
||
|
|
return ctxt->_regs[nr];
|
||
|
|
}
|
||
|
|
|
||
|
|
static inline ulong *reg_write(struct x86_emulate_ctxt *ctxt, unsigned nr)
|
||
|
|
{
|
||
|
|
if (KVM_EMULATOR_BUG_ON(nr >= NR_EMULATOR_GPRS, ctxt))
|
||
|
|
nr &= NR_EMULATOR_GPRS - 1;
|
||
|
|
|
||
|
|
BUILD_BUG_ON(sizeof(ctxt->regs_dirty) * BITS_PER_BYTE < NR_EMULATOR_GPRS);
|
||
|
|
BUILD_BUG_ON(sizeof(ctxt->regs_valid) * BITS_PER_BYTE < NR_EMULATOR_GPRS);
|
||
|
|
|
||
|
|
ctxt->regs_valid |= 1 << nr;
|
||
|
|
ctxt->regs_dirty |= 1 << nr;
|
||
|
|
return &ctxt->_regs[nr];
|
||
|
|
}
|
||
|
|
|
||
|
|
static inline ulong *reg_rmw(struct x86_emulate_ctxt *ctxt, unsigned nr)
|
||
|
|
{
|
||
|
|
reg_read(ctxt, nr);
|
||
|
|
return reg_write(ctxt, nr);
|
||
|
|
}
|
||
|
|
|
||
|
|
#endif /* _ASM_X86_KVM_X86_EMULATE_H */
|