409 lines
7.7 KiB
C
409 lines
7.7 KiB
C
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Intel BXT WhiskeyCove PMIC operation region driver
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*
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* Copyright (C) 2015 Intel Corporation. All rights reserved.
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*/
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#include <linux/init.h>
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#include <linux/acpi.h>
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#include <linux/mfd/intel_soc_pmic.h>
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#include <linux/regmap.h>
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#include <linux/platform_device.h>
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#include "intel_pmic.h"
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#define WHISKEY_COVE_ALRT_HIGH_BIT_MASK 0x0F
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#define WHISKEY_COVE_ADC_HIGH_BIT(x) (((x & 0x0F) << 8))
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#define WHISKEY_COVE_ADC_CURSRC(x) (((x & 0xF0) >> 4))
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#define VR_MODE_DISABLED 0
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#define VR_MODE_AUTO BIT(0)
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#define VR_MODE_NORMAL BIT(1)
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#define VR_MODE_SWITCH BIT(2)
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#define VR_MODE_ECO (BIT(0)|BIT(1))
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#define VSWITCH2_OUTPUT BIT(5)
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#define VSWITCH1_OUTPUT BIT(4)
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#define VUSBPHY_CHARGE BIT(1)
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static struct pmic_table power_table[] = {
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{
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.address = 0x0,
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.reg = 0x63,
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.bit = VR_MODE_AUTO,
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}, /* VDD1 -> VDD1CNT */
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{
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.address = 0x04,
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.reg = 0x65,
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.bit = VR_MODE_AUTO,
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}, /* VDD2 -> VDD2CNT */
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{
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.address = 0x08,
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.reg = 0x67,
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.bit = VR_MODE_AUTO,
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}, /* VDD3 -> VDD3CNT */
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{
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.address = 0x0c,
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.reg = 0x6d,
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.bit = VR_MODE_AUTO,
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}, /* VLFX -> VFLEXCNT */
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{
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.address = 0x10,
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.reg = 0x6f,
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.bit = VR_MODE_NORMAL,
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}, /* VP1A -> VPROG1ACNT */
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{
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.address = 0x14,
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.reg = 0x70,
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.bit = VR_MODE_NORMAL,
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}, /* VP1B -> VPROG1BCNT */
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{
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.address = 0x18,
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.reg = 0x71,
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.bit = VR_MODE_NORMAL,
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}, /* VP1C -> VPROG1CCNT */
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{
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.address = 0x1c,
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.reg = 0x72,
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.bit = VR_MODE_NORMAL,
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}, /* VP1D -> VPROG1DCNT */
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{
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.address = 0x20,
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.reg = 0x73,
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.bit = VR_MODE_NORMAL,
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}, /* VP2A -> VPROG2ACNT */
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{
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.address = 0x24,
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.reg = 0x74,
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.bit = VR_MODE_NORMAL,
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}, /* VP2B -> VPROG2BCNT */
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{
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.address = 0x28,
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.reg = 0x75,
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.bit = VR_MODE_NORMAL,
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}, /* VP2C -> VPROG2CCNT */
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{
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.address = 0x2c,
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.reg = 0x76,
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.bit = VR_MODE_NORMAL,
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}, /* VP3A -> VPROG3ACNT */
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{
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.address = 0x30,
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.reg = 0x77,
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.bit = VR_MODE_NORMAL,
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}, /* VP3B -> VPROG3BCNT */
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{
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.address = 0x34,
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.reg = 0x78,
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.bit = VSWITCH2_OUTPUT,
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}, /* VSW2 -> VLD0CNT Bit 5*/
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{
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.address = 0x38,
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.reg = 0x78,
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.bit = VSWITCH1_OUTPUT,
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}, /* VSW1 -> VLD0CNT Bit 4 */
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{
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.address = 0x3c,
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.reg = 0x78,
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.bit = VUSBPHY_CHARGE,
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}, /* VUPY -> VLDOCNT Bit 1 */
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{
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.address = 0x40,
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.reg = 0x7b,
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.bit = VR_MODE_NORMAL,
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}, /* VRSO -> VREFSOCCNT*/
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{
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.address = 0x44,
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.reg = 0xA0,
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.bit = VR_MODE_NORMAL,
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}, /* VP1E -> VPROG1ECNT */
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{
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.address = 0x48,
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.reg = 0xA1,
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.bit = VR_MODE_NORMAL,
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}, /* VP1F -> VPROG1FCNT */
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{
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.address = 0x4c,
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.reg = 0xA2,
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.bit = VR_MODE_NORMAL,
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}, /* VP2D -> VPROG2DCNT */
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{
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.address = 0x50,
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.reg = 0xA3,
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.bit = VR_MODE_NORMAL,
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}, /* VP4A -> VPROG4ACNT */
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{
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.address = 0x54,
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.reg = 0xA4,
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.bit = VR_MODE_NORMAL,
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}, /* VP4B -> VPROG4BCNT */
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{
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.address = 0x58,
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.reg = 0xA5,
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.bit = VR_MODE_NORMAL,
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}, /* VP4C -> VPROG4CCNT */
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{
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.address = 0x5c,
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.reg = 0xA6,
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.bit = VR_MODE_NORMAL,
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}, /* VP4D -> VPROG4DCNT */
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{
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.address = 0x60,
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.reg = 0xA7,
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.bit = VR_MODE_NORMAL,
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}, /* VP5A -> VPROG5ACNT */
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{
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.address = 0x64,
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.reg = 0xA8,
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.bit = VR_MODE_NORMAL,
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}, /* VP5B -> VPROG5BCNT */
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{
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.address = 0x68,
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.reg = 0xA9,
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.bit = VR_MODE_NORMAL,
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}, /* VP6A -> VPROG6ACNT */
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{
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.address = 0x6c,
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.reg = 0xAA,
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.bit = VR_MODE_NORMAL,
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}, /* VP6B -> VPROG6BCNT */
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{
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.address = 0x70,
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.reg = 0x36,
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.bit = BIT(2),
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}, /* SDWN_N -> MODEMCTRL Bit 2 */
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{
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.address = 0x74,
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.reg = 0x36,
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.bit = BIT(0),
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} /* MOFF -> MODEMCTRL Bit 0 */
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};
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static struct pmic_table thermal_table[] = {
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{
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.address = 0x00,
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.reg = 0x4F39
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},
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{
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.address = 0x04,
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.reg = 0x4F24
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},
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{
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.address = 0x08,
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.reg = 0x4F26
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},
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{
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.address = 0x0c,
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.reg = 0x4F3B
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},
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{
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.address = 0x10,
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.reg = 0x4F28
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},
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{
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.address = 0x14,
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.reg = 0x4F2A
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},
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{
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.address = 0x18,
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.reg = 0x4F3D
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},
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{
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.address = 0x1c,
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.reg = 0x4F2C
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},
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{
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.address = 0x20,
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.reg = 0x4F2E
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},
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{
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.address = 0x24,
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.reg = 0x4F3F
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},
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{
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.address = 0x28,
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.reg = 0x4F30
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},
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{
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.address = 0x30,
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.reg = 0x4F41
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},
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{
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.address = 0x34,
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.reg = 0x4F32
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},
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{
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.address = 0x3c,
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.reg = 0x4F43
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},
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{
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.address = 0x40,
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.reg = 0x4F34
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},
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{
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.address = 0x48,
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.reg = 0x4F6A,
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.bit = 0,
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},
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{
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.address = 0x4C,
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.reg = 0x4F6A,
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.bit = 1
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},
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{
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.address = 0x50,
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.reg = 0x4F6A,
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.bit = 2
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},
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{
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.address = 0x54,
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.reg = 0x4F6A,
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.bit = 4
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},
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{
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.address = 0x58,
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.reg = 0x4F6A,
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.bit = 5
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},
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{
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.address = 0x5C,
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.reg = 0x4F6A,
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.bit = 3
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},
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};
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static int intel_bxtwc_pmic_get_power(struct regmap *regmap, int reg,
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int bit, u64 *value)
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{
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int data;
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if (regmap_read(regmap, reg, &data))
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return -EIO;
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*value = (data & bit) ? 1 : 0;
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return 0;
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}
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static int intel_bxtwc_pmic_update_power(struct regmap *regmap, int reg,
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int bit, bool on)
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{
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u8 val, mask = bit;
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if (on)
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val = 0xFF;
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else
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val = 0x0;
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return regmap_update_bits(regmap, reg, mask, val);
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}
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static int intel_bxtwc_pmic_get_raw_temp(struct regmap *regmap, int reg)
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{
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unsigned int val, adc_val, reg_val;
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u8 temp_l, temp_h, cursrc;
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unsigned long rlsb;
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static const unsigned long rlsb_array[] = {
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0, 260420, 130210, 65100, 32550, 16280,
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8140, 4070, 2030, 0, 260420, 130210 };
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if (regmap_read(regmap, reg, &val))
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return -EIO;
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temp_l = (u8) val;
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if (regmap_read(regmap, (reg - 1), &val))
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return -EIO;
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temp_h = (u8) val;
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reg_val = temp_l | WHISKEY_COVE_ADC_HIGH_BIT(temp_h);
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cursrc = WHISKEY_COVE_ADC_CURSRC(temp_h);
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rlsb = rlsb_array[cursrc];
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adc_val = reg_val * rlsb / 1000;
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return adc_val;
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}
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static int
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intel_bxtwc_pmic_update_aux(struct regmap *regmap, int reg, int raw)
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{
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u32 bsr_num;
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u16 resi_val, count = 0, thrsh = 0;
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u8 alrt_h, alrt_l, cursel = 0;
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bsr_num = raw;
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bsr_num /= (1 << 5);
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count = fls(bsr_num) - 1;
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cursel = clamp_t(s8, (count - 7), 0, 7);
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thrsh = raw / (1 << (4 + cursel));
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resi_val = (cursel << 9) | thrsh;
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alrt_h = (resi_val >> 8) & WHISKEY_COVE_ALRT_HIGH_BIT_MASK;
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if (regmap_update_bits(regmap,
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reg - 1,
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WHISKEY_COVE_ALRT_HIGH_BIT_MASK,
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alrt_h))
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return -EIO;
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alrt_l = (u8)resi_val;
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return regmap_write(regmap, reg, alrt_l);
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}
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static int
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intel_bxtwc_pmic_get_policy(struct regmap *regmap, int reg, int bit, u64 *value)
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{
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u8 mask = BIT(bit);
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unsigned int val;
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if (regmap_read(regmap, reg, &val))
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return -EIO;
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*value = (val & mask) >> bit;
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return 0;
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}
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static int
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intel_bxtwc_pmic_update_policy(struct regmap *regmap,
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int reg, int bit, int enable)
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{
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u8 mask = BIT(bit), val = enable << bit;
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return regmap_update_bits(regmap, reg, mask, val);
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}
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static const struct intel_pmic_opregion_data intel_bxtwc_pmic_opregion_data = {
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.get_power = intel_bxtwc_pmic_get_power,
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.update_power = intel_bxtwc_pmic_update_power,
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.get_raw_temp = intel_bxtwc_pmic_get_raw_temp,
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.update_aux = intel_bxtwc_pmic_update_aux,
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.get_policy = intel_bxtwc_pmic_get_policy,
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.update_policy = intel_bxtwc_pmic_update_policy,
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.lpat_raw_to_temp = acpi_lpat_raw_to_temp,
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.power_table = power_table,
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.power_table_count = ARRAY_SIZE(power_table),
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.thermal_table = thermal_table,
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.thermal_table_count = ARRAY_SIZE(thermal_table),
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||
|
|
};
|
||
|
|
|
||
|
|
static int intel_bxtwc_pmic_opregion_probe(struct platform_device *pdev)
|
||
|
|
{
|
||
|
|
struct intel_soc_pmic *pmic = dev_get_drvdata(pdev->dev.parent);
|
||
|
|
|
||
|
|
return intel_pmic_install_opregion_handler(&pdev->dev,
|
||
|
|
ACPI_HANDLE(pdev->dev.parent),
|
||
|
|
pmic->regmap,
|
||
|
|
&intel_bxtwc_pmic_opregion_data);
|
||
|
|
}
|
||
|
|
|
||
|
|
static const struct platform_device_id bxt_wc_opregion_id_table[] = {
|
||
|
|
{ .name = "bxt_wcove_region" },
|
||
|
|
{},
|
||
|
|
};
|
||
|
|
|
||
|
|
static struct platform_driver intel_bxtwc_pmic_opregion_driver = {
|
||
|
|
.probe = intel_bxtwc_pmic_opregion_probe,
|
||
|
|
.driver = {
|
||
|
|
.name = "bxt_whiskey_cove_pmic",
|
||
|
|
},
|
||
|
|
.id_table = bxt_wc_opregion_id_table,
|
||
|
|
};
|
||
|
|
builtin_platform_driver(intel_bxtwc_pmic_opregion_driver);
|