2023-10-24 12:59:35 +02:00
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// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* (c) 1997-8 Grant R. Guenther <grant@torque.net>
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*
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* aten.c is a low-level protocol driver for the ATEN EH-100
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* parallel port adapter. The EH-100 supports 4-bit and 8-bit
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* modes only. There is also an EH-132 which supports EPP mode
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* transfers. The EH-132 is not yet supported.
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*/
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2023-08-30 17:31:07 +02:00
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/kernel.h>
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#include <linux/wait.h>
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#include <linux/types.h>
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#include <asm/io.h>
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2023-10-24 12:59:35 +02:00
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#include "pata_parport.h"
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2023-08-30 17:31:07 +02:00
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#define j44(a,b) ((((a>>4)&0x0f)|(b&0xf0))^0x88)
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2023-10-24 12:59:35 +02:00
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/*
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* cont = 0 - access the IDE register file
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* cont = 1 - access the IDE command set
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*/
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2023-08-30 17:31:07 +02:00
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static int cont_map[2] = { 0x08, 0x20 };
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2023-10-24 12:59:35 +02:00
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static void aten_write_regr(struct pi_adapter *pi, int cont, int regr, int val)
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{
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int r = regr + cont_map[cont] + 0x80;
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2023-08-30 17:31:07 +02:00
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w0(r); w2(0xe); w2(6); w0(val); w2(7); w2(6); w2(0xc);
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}
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2023-10-24 12:59:35 +02:00
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static int aten_read_regr(struct pi_adapter *pi, int cont, int regr)
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{
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int a, b, r;
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2023-08-30 17:31:07 +02:00
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2023-10-24 12:59:35 +02:00
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r = regr + cont_map[cont] + 0x40;
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2023-08-30 17:31:07 +02:00
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switch (pi->mode) {
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2023-10-24 12:59:35 +02:00
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case 0:
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w0(r); w2(0xe); w2(6);
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2023-08-30 17:31:07 +02:00
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w2(7); w2(6); w2(0);
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a = r1(); w0(0x10); b = r1(); w2(0xc);
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return j44(a,b);
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2023-10-24 12:59:35 +02:00
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case 1:
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r |= 0x10;
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w0(r); w2(0xe); w2(6); w0(0xff);
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2023-08-30 17:31:07 +02:00
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w2(0x27); w2(0x26); w2(0x20);
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a = r0();
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w2(0x26); w2(0xc);
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return a;
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}
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return -1;
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}
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2023-10-24 12:59:35 +02:00
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static void aten_read_block(struct pi_adapter *pi, char *buf, int count)
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{
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int k, a, b, c, d;
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2023-08-30 17:31:07 +02:00
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switch (pi->mode) {
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2023-10-24 12:59:35 +02:00
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case 0:
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w0(0x48); w2(0xe); w2(6);
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for (k = 0; k < count / 2; k++) {
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2023-08-30 17:31:07 +02:00
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w2(7); w2(6); w2(2);
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a = r1(); w0(0x58); b = r1();
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w2(0); d = r1(); w0(0x48); c = r1();
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2023-10-24 12:59:35 +02:00
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buf[2 * k] = j44(c, d);
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buf[2 * k + 1] = j44(a, b);
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2023-08-30 17:31:07 +02:00
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}
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w2(0xc);
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break;
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2023-10-24 12:59:35 +02:00
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case 1:
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w0(0x58); w2(0xe); w2(6);
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for (k = 0; k < count / 2; k++) {
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2023-08-30 17:31:07 +02:00
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w2(0x27); w2(0x26); w2(0x22);
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a = r0(); w2(0x20); b = r0();
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2023-10-24 12:59:35 +02:00
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buf[2 * k] = b;
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buf[2 * k + 1] = a;
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2023-08-30 17:31:07 +02:00
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}
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w2(0x26); w2(0xc);
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break;
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}
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}
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2023-10-24 12:59:35 +02:00
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static void aten_write_block(struct pi_adapter *pi, char *buf, int count)
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{
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int k;
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2023-08-30 17:31:07 +02:00
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w0(0x88); w2(0xe); w2(6);
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2023-10-24 12:59:35 +02:00
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for (k = 0; k < count / 2; k++) {
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w0(buf[2 * k + 1]); w2(0xe); w2(6);
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w0(buf[2 * k]); w2(7); w2(6);
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2023-08-30 17:31:07 +02:00
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}
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w2(0xc);
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}
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2023-10-24 12:59:35 +02:00
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static void aten_connect(struct pi_adapter *pi)
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{
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pi->saved_r0 = r0();
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pi->saved_r2 = r2();
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w2(0xc);
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2023-08-30 17:31:07 +02:00
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}
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2023-10-24 12:59:35 +02:00
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static void aten_disconnect(struct pi_adapter *pi)
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{
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w0(pi->saved_r0);
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w2(pi->saved_r2);
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}
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2023-08-30 17:31:07 +02:00
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2023-10-24 12:59:35 +02:00
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static void aten_log_adapter(struct pi_adapter *pi)
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{
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char *mode_string[2] = { "4-bit", "8-bit" };
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2023-08-30 17:31:07 +02:00
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2023-10-24 12:59:35 +02:00
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dev_info(&pi->dev,
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"ATEN EH-100 at 0x%x, mode %d (%s), delay %d\n",
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pi->port, pi->mode, mode_string[pi->mode], pi->delay);
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2023-08-30 17:31:07 +02:00
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}
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static struct pi_protocol aten = {
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.owner = THIS_MODULE,
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.name = "aten",
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.max_mode = 2,
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.epp_first = 2,
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.default_delay = 1,
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.max_units = 1,
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.write_regr = aten_write_regr,
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.read_regr = aten_read_regr,
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.write_block = aten_write_block,
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.read_block = aten_read_block,
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.connect = aten_connect,
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.disconnect = aten_disconnect,
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.log_adapter = aten_log_adapter,
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};
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MODULE_LICENSE("GPL");
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2023-10-24 12:59:35 +02:00
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MODULE_AUTHOR("Grant R. Guenther <grant@torque.net>");
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MODULE_DESCRIPTION("ATEN EH-100 parallel port IDE adapter protocol driver");
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module_pata_parport_driver(aten);
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