2023-08-30 17:31:07 +02:00
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// SPDX-License-Identifier: GPL-2.0
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/*
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* System Control and Management Interface (SCMI) Message SMC/HVC
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* Transport driver
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*
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* Copyright 2020 NXP
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*/
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#include <linux/arm-smccc.h>
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#include <linux/atomic.h>
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#include <linux/device.h>
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#include <linux/err.h>
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#include <linux/interrupt.h>
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#include <linux/mutex.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/of_irq.h>
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#include <linux/processor.h>
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#include <linux/slab.h>
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#include "common.h"
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2023-10-24 12:59:35 +02:00
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/*
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* The shmem address is split into 4K page and offset.
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* This is to make sure the parameters fit in 32bit arguments of the
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* smc/hvc call to keep it uniform across smc32/smc64 conventions.
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* This however limits the shmem address to 44 bit.
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*
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* These optional parameters can be used to distinguish among multiple
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* scmi instances that are using the same smc-id.
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* The page parameter is passed in r1/x1/w1 register and the offset parameter
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* is passed in r2/x2/w2 register.
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*/
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#define SHMEM_SIZE (SZ_4K)
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#define SHMEM_SHIFT 12
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#define SHMEM_PAGE(x) (_UL((x) >> SHMEM_SHIFT))
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#define SHMEM_OFFSET(x) ((x) & (SHMEM_SIZE - 1))
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2023-08-30 17:31:07 +02:00
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/**
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* struct scmi_smc - Structure representing a SCMI smc transport
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*
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2023-10-24 12:59:35 +02:00
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* @irq: An optional IRQ for completion
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2023-08-30 17:31:07 +02:00
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* @cinfo: SCMI channel info
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* @shmem: Transmit/Receive shared memory area
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* @shmem_lock: Lock to protect access to Tx/Rx shared memory area.
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* Used when NOT operating in atomic mode.
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* @inflight: Atomic flag to protect access to Tx/Rx shared memory area.
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* Used when operating in atomic mode.
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* @func_id: smc/hvc call function id
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2023-10-24 12:59:35 +02:00
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* @param_page: 4K page number of the shmem channel
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* @param_offset: Offset within the 4K page of the shmem channel
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*/
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struct scmi_smc {
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int irq;
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struct scmi_chan_info *cinfo;
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struct scmi_shared_mem __iomem *shmem;
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/* Protect access to shmem area */
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struct mutex shmem_lock;
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#define INFLIGHT_NONE MSG_TOKEN_MAX
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atomic_t inflight;
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u32 func_id;
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u32 param_page;
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u32 param_offset;
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2023-08-30 17:31:07 +02:00
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};
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static irqreturn_t smc_msg_done_isr(int irq, void *data)
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{
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struct scmi_smc *scmi_info = data;
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scmi_rx_callback(scmi_info->cinfo,
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shmem_read_header(scmi_info->shmem), NULL);
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return IRQ_HANDLED;
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}
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static bool smc_chan_available(struct device_node *of_node, int idx)
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{
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struct device_node *np = of_parse_phandle(of_node, "shmem", 0);
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if (!np)
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return false;
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of_node_put(np);
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return true;
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}
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static inline void smc_channel_lock_init(struct scmi_smc *scmi_info)
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{
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if (IS_ENABLED(CONFIG_ARM_SCMI_TRANSPORT_SMC_ATOMIC_ENABLE))
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atomic_set(&scmi_info->inflight, INFLIGHT_NONE);
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else
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mutex_init(&scmi_info->shmem_lock);
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}
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static bool smc_xfer_inflight(struct scmi_xfer *xfer, atomic_t *inflight)
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{
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int ret;
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ret = atomic_cmpxchg(inflight, INFLIGHT_NONE, xfer->hdr.seq);
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return ret == INFLIGHT_NONE;
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}
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static inline void
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smc_channel_lock_acquire(struct scmi_smc *scmi_info,
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struct scmi_xfer *xfer __maybe_unused)
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{
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if (IS_ENABLED(CONFIG_ARM_SCMI_TRANSPORT_SMC_ATOMIC_ENABLE))
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spin_until_cond(smc_xfer_inflight(xfer, &scmi_info->inflight));
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else
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mutex_lock(&scmi_info->shmem_lock);
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}
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static inline void smc_channel_lock_release(struct scmi_smc *scmi_info)
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{
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if (IS_ENABLED(CONFIG_ARM_SCMI_TRANSPORT_SMC_ATOMIC_ENABLE))
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atomic_set(&scmi_info->inflight, INFLIGHT_NONE);
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else
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mutex_unlock(&scmi_info->shmem_lock);
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}
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static int smc_chan_setup(struct scmi_chan_info *cinfo, struct device *dev,
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bool tx)
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{
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struct device *cdev = cinfo->dev;
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struct scmi_smc *scmi_info;
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resource_size_t size;
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struct resource res;
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struct device_node *np;
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u32 func_id;
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int ret;
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if (!tx)
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return -ENODEV;
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scmi_info = devm_kzalloc(dev, sizeof(*scmi_info), GFP_KERNEL);
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if (!scmi_info)
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return -ENOMEM;
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np = of_parse_phandle(cdev->of_node, "shmem", 0);
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if (!of_device_is_compatible(np, "arm,scmi-shmem")) {
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of_node_put(np);
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return -ENXIO;
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}
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ret = of_address_to_resource(np, 0, &res);
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of_node_put(np);
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if (ret) {
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dev_err(cdev, "failed to get SCMI Tx shared memory\n");
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return ret;
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}
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size = resource_size(&res);
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scmi_info->shmem = devm_ioremap(dev, res.start, size);
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if (!scmi_info->shmem) {
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dev_err(dev, "failed to ioremap SCMI Tx shared memory\n");
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return -EADDRNOTAVAIL;
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}
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ret = of_property_read_u32(dev->of_node, "arm,smc-id", &func_id);
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if (ret < 0)
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return ret;
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2023-10-24 12:59:35 +02:00
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if (of_device_is_compatible(dev->of_node, "arm,scmi-smc-param")) {
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scmi_info->param_page = SHMEM_PAGE(res.start);
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scmi_info->param_offset = SHMEM_OFFSET(res.start);
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}
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2023-08-30 17:31:07 +02:00
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/*
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* If there is an interrupt named "a2p", then the service and
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* completion of a message is signaled by an interrupt rather than by
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* the return of the SMC call.
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*/
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scmi_info->irq = of_irq_get_byname(cdev->of_node, "a2p");
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if (scmi_info->irq > 0) {
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ret = request_irq(scmi_info->irq, smc_msg_done_isr,
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IRQF_NO_SUSPEND, dev_name(dev), scmi_info);
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if (ret) {
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dev_err(dev, "failed to setup SCMI smc irq\n");
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return ret;
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}
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} else {
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cinfo->no_completion_irq = true;
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}
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scmi_info->func_id = func_id;
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scmi_info->cinfo = cinfo;
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smc_channel_lock_init(scmi_info);
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cinfo->transport_info = scmi_info;
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return 0;
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}
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static int smc_chan_free(int id, void *p, void *data)
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{
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struct scmi_chan_info *cinfo = p;
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struct scmi_smc *scmi_info = cinfo->transport_info;
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2023-10-24 12:59:35 +02:00
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/* Ignore any possible further reception on the IRQ path */
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if (scmi_info->irq > 0)
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free_irq(scmi_info->irq, scmi_info);
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2023-08-30 17:31:07 +02:00
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cinfo->transport_info = NULL;
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scmi_info->cinfo = NULL;
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return 0;
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}
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static int smc_send_message(struct scmi_chan_info *cinfo,
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struct scmi_xfer *xfer)
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{
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struct scmi_smc *scmi_info = cinfo->transport_info;
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struct arm_smccc_res res;
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unsigned long page = scmi_info->param_page;
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unsigned long offset = scmi_info->param_offset;
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/*
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* Channel will be released only once response has been
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* surely fully retrieved, so after .mark_txdone()
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*/
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smc_channel_lock_acquire(scmi_info, xfer);
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shmem_tx_prepare(scmi_info->shmem, xfer, cinfo);
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2023-10-24 12:59:35 +02:00
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arm_smccc_1_1_invoke(scmi_info->func_id, page, offset, 0, 0, 0, 0, 0,
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&res);
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/* Only SMCCC_RET_NOT_SUPPORTED is valid error code */
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if (res.a0) {
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smc_channel_lock_release(scmi_info);
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return -EOPNOTSUPP;
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}
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return 0;
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}
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static void smc_fetch_response(struct scmi_chan_info *cinfo,
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struct scmi_xfer *xfer)
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{
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struct scmi_smc *scmi_info = cinfo->transport_info;
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shmem_fetch_response(scmi_info->shmem, xfer);
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}
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static void smc_mark_txdone(struct scmi_chan_info *cinfo, int ret,
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struct scmi_xfer *__unused)
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{
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struct scmi_smc *scmi_info = cinfo->transport_info;
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smc_channel_lock_release(scmi_info);
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}
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static const struct scmi_transport_ops scmi_smc_ops = {
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.chan_available = smc_chan_available,
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.chan_setup = smc_chan_setup,
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.chan_free = smc_chan_free,
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.send_message = smc_send_message,
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.mark_txdone = smc_mark_txdone,
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.fetch_response = smc_fetch_response,
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};
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const struct scmi_desc scmi_smc_desc = {
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.ops = &scmi_smc_ops,
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.max_rx_timeout_ms = 30,
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.max_msg = 20,
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.max_msg_size = 128,
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/*
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* Setting .sync_cmds_atomic_replies to true for SMC assumes that,
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* once the SMC instruction has completed successfully, the issued
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* SCMI command would have been already fully processed by the SCMI
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* platform firmware and so any possible response value expected
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* for the issued command will be immmediately ready to be fetched
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* from the shared memory area.
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*/
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.sync_cmds_completed_on_ret = true,
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.atomic_enabled = IS_ENABLED(CONFIG_ARM_SCMI_TRANSPORT_SMC_ATOMIC_ENABLE),
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};
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